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Commits on May 7, 2024

• Expose config register reset values as parameter (#16)

  Show description for d5b0064
  

  phsauter

  and

  Philippe Sauter

  authored
  d5b0064

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Commits on Jan 15, 2024

• [RTL] Fix Phy FSM: add a parameter t_csh to delay the CSn pos relate to last CK neg in read/write transaction

  

  Zhang Chi

  authored and

  luca-valente

  committed
  bd5688d

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Commits on Oct 6, 2023

• Add axi_fifo to support more outstandings.

  luca-valente

  committed
  80de8df

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Commits on Sep 12, 2023

• Propagating SyncStages param to cdc_gray.

  

  Mattia Sinigaglia

  authored and

  luca-valente

  committed
  a13ae13

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• Delete trailing whitespaces.

  luca-valente

  committed
  36666fd

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• Change DQ and RWDS tri-state en signals earlier than data

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  Manuel Eggimann

  authored and

  luca-valente

  committed
  3a82b3d

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• Rename delay line and Bump AXI

  

  Manuel Eggimann

  authored and

  luca-valente

  committed
  687cc07

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• Add register to select which phy to use when possible.

  luca-valente

  committed
  7cfdb14

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• Add register to change phys in use at runtime.

  luca-valente

  committed
  e2c87b7

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Commits on Jun 1, 2023

• We actually support BURST_FIXED.

  luca-valente

  committed
  be110d1

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• Remove parasitic latch for ax_blen_inc and trailing whitespaces.

  luca-valente

  committed
  b189418

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Commits on May 5, 2023

• hw: fix inferred latch in always_comb

  

  joennlae

  authored and

  luca-valente

  committed
  fb19636

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Commits on Feb 22, 2023

• treewide: Release of HyperBus v2

  thommythomaso

  committed
  ffde18a

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