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Summary on Skill-lab session from 8/7/24 to 13/7/24 on "Basics of VLSI design and Cadence Software"

Day1
Session-1 1) Addition, multiplication and shift are three basic operations in any basic VLSI design.
2) PMOS and NMOS introduction.
3) Inverter design using PMOS and NMOS.
4) Carry Look Ahead Adder truth table.
5) Voltage transfer characteristics and transient analysis.
6) AND = NAND and then connected to NOT gate is correct but NAND = AND and then connected to NOT gate is completely wrong.
Session-2 and 3 1) CMOS implementation on Cadence Software on linux (ubuntu).
2) We log in to network page using ssh keys and ip address. Enter password and then type `csh` and 'source cshrc_617'. Shift to appropriate directory and then type 'virtuoso &'.
3) Tutorials on youtube are available.
Day2
Session-1 1) Some server errors, how to get to know the status of a server? How to ping it?
2) CMOS inverter on Cadence software.
3) https://youtu.be/64c4djOzam8?feature=shared
Session-2 and 3 1) Full adder realization using CMOS technology.
2) Realizing the circuit and how many transistors are required.
3) How do you reduce the number of transistors? From the truth table, find something which is common, you can remove redundancy.
4) In total, 38 transistors are required to realise the 1 bit full adder.
Day3
Session-1 1) Complete basics of CMOS technology, its equivalent layout design, manufacturing process and much more.
2) Working of pmos, nmos and equations related to it.
3) Manufacturing of silicon wafers using ingots, testing of silicon dyes, then defected ones are rejected.
Session-2 and 3 1) Inverter Layout tutorial: https://www.youtube.com/watch?v=-PUA56qGOoY
2) NAND gate layout tutorial: https://youtu.be/Kp09HhWcKlg?si=K48R7tG1EpJhAKtr
Day4
Session-1 1) Realisation of Half-adder using already ready made NAND gate layout.
2) Realisation of Full-Adder using Half Adder layouts.
Session-2 and 3 1) Multiplexer Design.
2) Multiplexer circuit design using CMOS tech.
3) Realisation using Cadence Software.
Day5
Session-1 1) Power optimization techniques for VLSI design.
2) Design of SRAM.
Session-2 and 3 1) https://youtu.be/EkY2MJ_qMJc?si=HGUdJeJijfH-8TLo
2) https://youtu.be/V_Hfqq8ylVo?si=2xfiXLZ7MxcYR7_U
3) https://youtu.be/CTPxV2ImV6s?si=OTLIgExo9quMKHvW
4) https://youtu.be/661dmRnVp9M?si=ByLDIp_dXsdGY_aO
5) https://youtu.be/6Ys0v3U90q4?si=nmH69HHUPZ8ran3m
6) In Summary: Design of SRAM, Optimizing SRAM design, CMOS inverter (parasitic extraction and post-layout simulation).

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