fix: remove #![feature(asm)]

The `asm` feature has been stabilized by
<rust-lang/rust#91728>, which also removed
`[global_]asm!` from the prelude.

examples/basic_gr_peach/src/main.rs

@@ -2,7 +2,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_mut_refs)]
 #![feature(const_trait_impl)]
-#![feature(asm)]
 #![feature(asm_sym)]
 #![feature(naked_functions)]
 #![deny(unsafe_op_in_unsafe_fn)]

examples/basic_nucleo_f401re/src/main.rs

@@ -1,4 +1,3 @@
-#![feature(asm)]
 #![feature(asm_sym)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_fn_fn_ptr_basics)]

examples/basic_rp_pico/src/main.rs

@@ -1,4 +1,3 @@
-#![feature(asm)]
 #![feature(asm_sym)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_fn_fn_ptr_basics)]

examples/basic_rp_pico/src/panic_serial.rs

@@ -1,4 +1,4 @@
-use core::panic::PanicInfo;
+use core::{arch::asm, panic::PanicInfo};
 
 // Install a global panic handler that uses the serial port
 #[inline(never)]

examples/basic_wio_terminal/src/main.rs

@@ -1,4 +1,3 @@
-#![feature(asm)]
 #![feature(asm_sym)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_fn_fn_ptr_basics)]
@@ -59,6 +58,7 @@ impl port::SysTickOptions for SystemTraits {
 /// disabled (`default-features = false`), `wio_terminal` fails to compile. So
 /// the only option left ot us is to suppress our `__INTERRUPTS`.
 const _: () = {
+    use core::arch::asm;
     use port::{rt::imp::ExceptionTrampoline, EntryPoint, INTERRUPT_SYSTICK};
     use r3_kernel::KernelCfg2;
 

examples/smp_rp_pico/src/main.rs

@@ -1,4 +1,3 @@
-#![feature(asm)]
 #![feature(asm_sym)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_fn_fn_ptr_basics)]

src/arm_semihosting/src/export.rs

@@ -1,16 +1,14 @@
 //! IMPLEMENTATION DETAILS USED BY MACROS
 
-use core::{
-    arch::asm,
-    fmt::{self, Write},
-};
+use core::fmt::{self, Write};
 
 use crate::hio::{self, HStderr, HStdout};
 
 static mut HSTDOUT: Option<HStdout> = None;
 
 #[cfg(arm)]
 fn interrupt_free<R>(f: impl FnOnce() -> R) -> R {
+    use core::arch::asm;
     let cpsr_old: u32;
     unsafe { asm!("mrs {}, cpsr", out(reg) cpsr_old) };
     unsafe { asm!("cpsid i") };

src/arm_semihosting/src/lib.rs

@@ -44,7 +44,6 @@
 //!
 //! [pdf]: http://infocenter.arm.com/help/topic/com.arm.doc.dui0471e/DUI0471E_developing_for_arm_processors.pdf
 
-#![feature(asm)]
 #![deny(missing_docs)]
 #![deny(unsupported_naked_functions)]
 #![no_std]
@@ -75,6 +74,7 @@ pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize {
     match () {
         #[cfg(all(thumb, arm, not(feature = "no-semihosting")))]
         () => {
+            use core::arch::asm;
             let mut nr = _nr;
             asm!("svc 0xAB", inout("r0") nr, in("r1") _arg, out("lr") _);
             nr
@@ -85,6 +85,7 @@ pub unsafe fn syscall1(_nr: usize, _arg: usize) -> usize {
 
         #[cfg(all(not(thumb), arm, not(feature = "no-semihosting")))]
         () => {
+            use core::arch::asm;
             let mut nr = _nr;
             asm!("svc 0x123456", inout("r0") nr, in("r1") _arg, out("lr") _);
             nr

src/r3_port_arm/src/arm.rs

@@ -5,7 +5,7 @@ macro_rules! sys_coproc_read_raw {
         fn get(&self) -> u32 {
             let reg;
             unsafe {
-                asm!(
+                core::arch::asm!(
                     concat!(
                         "mrc ", stringify!($cp), ", ", stringify!($opc1), ", {}, ",
                         stringify!($crn), ", ", stringify!($crm), ", ", stringify!($opc2)
@@ -23,7 +23,7 @@ macro_rules! sys_coproc_write_raw {
         #[inline]
         fn set(&self, value: u32) {
             unsafe {
-                asm!(
+                core::arch::asm!(
                     concat!(
                         "mcr ", stringify!($cp), ", ", stringify!($opc1), ", {}, ",
                         stringify!($crn), ", ", stringify!($crm), ", ", stringify!($opc2)

src/r3_port_arm/src/lib.rs

@@ -8,7 +8,6 @@
 #![feature(decl_macro)]
 #![feature(asm_const)]
 #![feature(asm_sym)]
-#![feature(asm)]
 #![feature(naked_functions)]
 #![feature(slice_ptr_len)]
 #![deny(unsafe_op_in_unsafe_fn)]

src/r3_port_arm/src/startup/cfg.rs

@@ -15,7 +15,7 @@ macro_rules! use_startup {
         #[no_mangle]
         #[naked]
         pub unsafe extern "C" fn start() {
-            asm!(
+            ::core::arch::asm!(
                 "b {}",
                 sym $crate::startup::imp::start::<$Traits>,
                 options(noreturn),

src/r3_port_arm/src/startup/imp.rs

@@ -1,4 +1,5 @@
 //! Provides a standard startup and entry code implementation.
+use core::arch::asm;
 use tock_registers::interfaces::{ReadWriteable, Readable, Writeable};
 
 use crate::{arm, startup::cfg::MemoryRegionAttributes, EntryPoint, StartupOptions};

src/r3_port_arm/src/threading/imp.rs

@@ -1,4 +1,4 @@
-use core::{cell::UnsafeCell, mem::MaybeUninit, slice};
+use core::{arch::asm, cell::UnsafeCell, mem::MaybeUninit, slice};
 use memoffset::offset_of;
 use r3::{
     kernel::traits,

src/r3_port_arm_m/src/lib.rs

@@ -3,7 +3,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(asm_const)]
 #![feature(asm_sym)]
-#![feature(asm)]
 #![feature(decl_macro)]
 #![feature(generic_const_exprs)]
 #![feature(const_ptr_offset_from)]

src/r3_port_arm_m/src/rt/cfg.rs

@@ -32,7 +32,7 @@ macro_rules! use_rt {
                 // recognized the linker as a Thumb function, its address does not have its least
                 // significant bit set to mark a Thumb function. So we set the bit here.
                 unsafe {
-                    asm!(
+                    ::core::arch::asm!(
                         "
                             .global PendSV
                             PendSV = {} + 1

src/r3_port_arm_m_test_driver/src/main.rs

@@ -1,4 +1,3 @@
-#![feature(asm)]
 #![feature(asm_sym)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_mut_refs)]

src/r3_port_arm_test_driver/src/main.rs

@@ -8,7 +8,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(naked_functions)]
 #![feature(const_trait_impl)]
-#![feature(asm)]
 #![feature(asm_sym)]
 #![deny(unsafe_op_in_unsafe_fn)]
 #![deny(unsupported_naked_functions)]

src/r3_port_arm_test_driver/src/panic_semihosting.rs

@@ -1,6 +1,6 @@
 use arm_semihosting::{debug, debug::EXIT_FAILURE, hio};
 use arrayvec::ArrayString;
-use core::{fmt::Write, panic::PanicInfo};
+use core::{arch::asm, fmt::Write, panic::PanicInfo};
 
 static mut BUFFER: ArrayString<512> = ArrayString::new_const();
 

src/r3_port_arm_test_driver/src/pmu.rs

@@ -5,7 +5,7 @@ macro_rules! sys_coproc_read_raw {
         fn get(&self) -> u32 {
             let reg;
             unsafe {
-                asm!(
+                core::arch::asm!(
                     concat!(
                         "mrc ", stringify!($cp), ", ", stringify!($opc1), ", {}, ",
                         stringify!($crn), ", ", stringify!($crm), ", ", stringify!($opc2)
@@ -23,7 +23,7 @@ macro_rules! sys_coproc_write_raw {
         #[inline]
         fn set(&self, value: u32) {
             unsafe {
-                asm!(
+                core::arch::asm!(
                     concat!(
                         "mcr ", stringify!($cp), ", ", stringify!($opc1), ", {}, ",
                         stringify!($crn), ", ", stringify!($crm), ", ", stringify!($opc2)

src/r3_port_riscv/src/lib.rs

@@ -4,7 +4,6 @@
 #![feature(slice_ptr_len)]
 #![feature(asm_const)]
 #![feature(asm_sym)]
-#![feature(asm)]
 #![feature(raw_ref_op)]
 #![feature(const_option)]
 #![feature(const_mut_refs)]

src/r3_port_riscv/src/rt/imp.rs

@@ -2,6 +2,6 @@ use crate::EntryPoint;
 
 pub unsafe fn setup_interrupt_handler<System: EntryPoint>() {
     unsafe {
-        asm!("csrw mtvec, {}", in(reg) System::TRAP_HANDLER);
+        core::arch::asm!("csrw mtvec, {}", in(reg) System::TRAP_HANDLER);
     }
 }

src/r3_port_riscv/src/threading/imp.rs

@@ -1,4 +1,4 @@
-use core::{cell::UnsafeCell, hint::unreachable_unchecked, mem::MaybeUninit, slice};
+use core::{arch::asm, cell::UnsafeCell, hint::unreachable_unchecked, mem::MaybeUninit, slice};
 use r3::{
     kernel::{
         interrupt::{InterruptHandlerFn, InterruptNum},
@@ -14,6 +14,8 @@ use crate::{InterruptController, ThreadingOptions, INTERRUPT_PLATFORM_START, INT
 
 /// `mstatus` (Machine Status Register)
 mod mstatus {
+    use core::arch::asm;
+
     pub const MIE: usize = 1 << 3;
     pub const MPIE: usize = 1 << 7;
     pub const MPP_M: usize = 0b11 << 11;
@@ -53,6 +55,8 @@ mod mstatus {
 #[allow(non_upper_case_globals)]
 #[allow(dead_code)]
 mod mcause {
+    use core::arch::asm;
+
     pub const Interrupt: usize = usize::MAX - usize::MAX / 2;
     pub const ExceptionCode_MASK: usize = usize::MAX / 2;
 
@@ -66,6 +70,8 @@ mod mcause {
 
 /// `mip` (Machine Interrupt Pending)
 mod mip {
+    use core::arch::asm;
+
     /// Machine Software Interrupt Pending
     pub const MSIP: usize = 1 << 3;
     /// Machine Timer Interrupt Pending
@@ -93,6 +99,8 @@ mod mip {
 
 /// `mip` (Machine Interrupt Enable)
 mod mie {
+    use core::arch::asm;
+
     /// Machine Software Interrupt Enable
     pub const MSIE: usize = 1 << 3;
     /// Machine Timer Interrupt Enable

src/r3_port_riscv_test_driver/src/driver_kernel_tests/execute_lr_sc.rs

@@ -1,6 +1,6 @@
 //! Executes LR and SC instructions with various parameters. This test will
 //! exercise the emulation code (`emulate-lr-sc`) on some targets.
-use core::{marker::PhantomData, mem::MaybeUninit, ptr::addr_of_mut};
+use core::{arch::global_asm, marker::PhantomData, mem::MaybeUninit, ptr::addr_of_mut};
 use r3::kernel::{prelude::*, traits, Cfg, StartupHook, StaticTask};
 use r3_portkit::pptext::pp_asm;
 use r3_test_suite::kernel_tests::Driver;

src/r3_port_riscv_test_driver/src/main.rs

@@ -1,12 +1,10 @@
-#![feature(asm)]
 #![feature(asm_const)]
 #![feature(asm_sym)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_mut_refs)]
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_trait_impl)]
 #![feature(naked_functions)]
-#![feature(global_asm)]
 #![feature(decl_macro)]
 #![feature(const_ptr_offset)]
 #![deny(unsafe_op_in_unsafe_fn)]
@@ -70,7 +68,7 @@ macro_rules! instantiate_test {
             loop {
                 // prevent the loop from being optimized out
                 // <https://github.com/rust-lang/rust/issues/28728>
-                unsafe { asm!("") };
+                unsafe { core::arch::asm!("") };
             }
         }
 
@@ -144,7 +142,7 @@ macro_rules! instantiate_test {
             fn performance_time() -> u32 {
                 unsafe {
                     let mcycle;
-                    asm!("csrr {}, mcycle", out(reg)mcycle);
+                    core::arch::asm!("csrr {}, mcycle", out(reg)mcycle);
                     mcycle
                 }
             }

src/r3_port_riscv_test_driver/src/panic_rtt.rs

@@ -1,4 +1,4 @@
-use core::{fmt::Write, panic::PanicInfo};
+use core::{arch::asm, fmt::Write, panic::PanicInfo};
 use rtt_target::{ChannelMode, UpChannel};
 
 // Install a global panic handler that uses RTT

src/r3_port_riscv_test_driver/src/u540.rs

@@ -11,6 +11,6 @@ pub fn mp_hook() -> bool {
         _ => {}
     }
     loop {
-        unsafe { asm!("wfi") };
+        unsafe { core::arch::asm!("wfi") };
     }
 }

src/r3_port_std/src/lib.rs

@@ -1,7 +1,6 @@
 #![feature(const_fn_trait_bound)]
 #![feature(thread_local)]
 #![feature(deadline_api)]
-#![feature(asm)]
 #![feature(cfg_target_has_atomic)] // `#[cfg(target_has_atomic_load_store)]`
 #![doc(html_logo_url = "https://r3-os.github.io/r3/logo-small.svg")]
 #![doc = include_str!("./lib.md")]

src/r3_port_std/src/threading_unix.rs

@@ -2,6 +2,7 @@
 //! operation ([`Thread::park`]).
 use crate::utils::Atomic;
 use std::{
+    arch::asm,
     cell::Cell,
     mem::MaybeUninit,
     os::raw::c_int,

src/r3_portkit/src/lib.rs

@@ -5,7 +5,6 @@
 #![feature(core_panic)]
 #![feature(decl_macro)]
 #![feature(const_fn_fn_ptr_basics)]
-#![feature(asm)]
 #![doc(html_logo_url = "https://r3-os.github.io/r3/logo-small.svg")]
 #![deny(unsupported_naked_functions)]
 #![no_std]

src/r3_portkit/src/pptext.rs

@@ -262,7 +262,6 @@ pub macro pp_llvm_asm {
 /// # Examples
 ///
 /// ```
-/// #![feature(asm)]
 /// #![feature(decl_macro)]
 ///
 /// #[macro_export]  // work-around for mysterious macro hygienics behavior
@@ -337,7 +336,7 @@ pub macro pp_asm {
         $crate::pptext::pp_text_macro! {
             macro pp_asm_code { $($code)* }
         }
-        asm!(pp_asm_code!() $($unprocessed)*);
+        ::core::arch::asm!(pp_asm_code!() $($unprocessed)*);
     }},
     // -------------------------------------------------------------------
     // The entry point

src/r3_portkit/src/sym.rs

@@ -123,12 +123,11 @@ pub const DEFAULT_FN_ALIGN: usize = if cfg!(target_arch = "aarch64") {
 /// # Examples
 ///
 /// ```
-/// #![feature(asm)]
 /// #![feature(asm_sym)]
 /// #![feature(asm_const)]
 /// #![feature(naked_functions)]
 /// use r3_portkit::sym::{sym_static, SymStatic, SymStaticExt};
-/// use std::cell::Cell;
+/// use std::{arch::asm, cell::Cell};
 ///
 /// struct InteriorMutable(Cell<usize>);
 /// unsafe impl Sync for InteriorMutable {}

src/r3_support_rp2040/src/lib.rs

@@ -4,7 +4,6 @@
 //! [R3]: ::r3
 //! [Raspberry Pi Pico]: https://pico.raspberrypi.org
 #![feature(raw_ref_op)]
-#![feature(asm)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_mut_refs)]
 #![feature(const_fn_fn_ptr_basics)]

src/r3_support_rp2040/src/usb.rs

@@ -270,7 +270,7 @@ impl usb_device::bus::UsbBus for UsbBus {
         // 12 cycle delay
         #[cfg(target_arch = "arm")]
         unsafe {
-            asm!(
+            core::arch::asm!(
                 "b 1f
                     1: b 1f
                     1: b 1f

src/r3_support_rza1/src/lib.rs

@@ -8,7 +8,6 @@
 #![feature(const_fn_fn_ptr_basics)]
 #![feature(const_fn_trait_bound)]
 #![feature(const_trait_impl)]
-#![feature(asm)]
 #![doc(html_logo_url = "https://r3-os.github.io/r3/logo-small.svg")]
 #![deny(unsafe_op_in_unsafe_fn)]
 #![deny(unsupported_naked_functions)]

src/r3_support_rza1/src/stdout.rs

@@ -58,6 +58,8 @@ where
 #[inline]
 #[cfg(target_arch = "arm")]
 fn interrupt_free<T>(x: impl FnOnce() -> T) -> T {
+    use core::arch::asm;
+
     let cpsr: u32;
     unsafe { asm!("mrs {}, cpsr", out(reg)cpsr) };
     let unmask = (cpsr & (1 << 7)) == 0;