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jit: add compile option
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RSDuck committed Jun 16, 2020
1 parent fc82ca1 commit 86f2be7
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Showing 11 changed files with 136 additions and 53 deletions.
36 changes: 36 additions & 0 deletions CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -14,6 +14,42 @@ if (NOT CMAKE_BUILD_TYPE)
set(CMAKE_BUILD_TYPE Release)
endif()

include(CheckSymbolExists)
function(detect_architecture symbol arch)
if (NOT DEFINED ARCHITECTURE)
set(CMAKE_REQUIRED_QUIET 1)
check_symbol_exists("${symbol}" "" ARCHITECTURE_${arch})
unset(CMAKE_REQUIRED_QUIET)

# The output variable needs to be unique across invocations otherwise
# CMake's crazy scope rules will keep it defined
if (ARCHITECTURE_${arch})
set(ARCHITECTURE "${arch}" PARENT_SCOPE)
set(ARCHITECTURE_${arch} 1 PARENT_SCOPE)
add_definitions(-DARCHITECTURE_${arch}=1)
endif()
endif()
endfunction()

detect_architecture("__x86_64__" x86_64)
detect_architecture("__i386__" x86)
detect_architecture("__arm__" ARM)
detect_architecture("__aarch64__" ARM64)

if (ARCHITECTURE STREQUAL x86_64)
option(ENABLE_JIT "Enable x64 JIT recompiler" ON)
endif()

if (ENABLE_JIT)
add_definitions(-DJIT_ENABLED)
endif()

if (CMAKE_BUILD_TYPE STREQUAL Release)
option(ENABLE_LTO "Enable link-time optimization" ON)
else()
option(ENABLE_LTO "Enable link-time optimization" OFF)
endif()

if (CMAKE_BUILD_TYPE STREQUAL Debug)
add_compile_options(-Og)
endif()
Expand Down
13 changes: 5 additions & 8 deletions src/ARM.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -81,15 +81,8 @@ ARMv4::ARMv4() : ARM(1)
//
}

namespace ARMJIT {extern int instructionPopularityARM[ARMInstrInfo::ak_Count];}

void ARM::Reset()
{
FILE* blabla = fopen("fhhg", "w");
for (int i = 0; i < ARMInstrInfo::ak_Count; i++)
fprintf(blabla, "%d -> %dx\n", i, ARMJIT::instructionPopularityARM[i]);
fclose(blabla);

Cycles = 0;
Halted = 0;

Expand Down Expand Up @@ -591,6 +584,7 @@ void ARMv5::Execute()
Halted = 0;
}

#ifdef JIT_ENABLED
void ARMv5::ExecuteJIT()
{
if (Halted)
Expand Down Expand Up @@ -642,6 +636,7 @@ void ARMv5::ExecuteJIT()
if (Halted == 2)
Halted = 0;
}
#endif

void ARMv4::Execute()
{
Expand Down Expand Up @@ -720,6 +715,7 @@ void ARMv4::Execute()
Halted = 0;
}

#ifdef JIT_ENABLED
void ARMv4::ExecuteJIT()
{
if (Halted)
Expand Down Expand Up @@ -771,4 +767,5 @@ void ARMv4::ExecuteJIT()

if (Halted == 2)
Halted = 0;
}
}
#endif
6 changes: 6 additions & 0 deletions src/ARM.h
Original file line number Diff line number Diff line change
Expand Up @@ -52,7 +52,9 @@ class ARM
}

virtual void Execute() = 0;
#ifdef ENABLE_JIT
virtual void ExecuteJIT() = 0;
#endif

bool CheckCondition(u32 code)
{
Expand Down Expand Up @@ -160,7 +162,9 @@ class ARMv5 : public ARM
void DataAbort();

void Execute();
#ifdef JIT_ENABLED
void ExecuteJIT();
#endif

// all code accesses are forced nonseq 32bit
u32 CodeRead32(u32 addr, bool branch);
Expand Down Expand Up @@ -283,7 +287,9 @@ class ARMv4 : public ARM
void JumpTo(u32 addr, bool restorecpsr = false);

void Execute();
#ifdef JIT_ENABLED
void ExecuteJIT();
#endif

u16 CodeRead16(u32 addr)
{
Expand Down
61 changes: 33 additions & 28 deletions src/ARMJIT_x64/ARMJIT_Compiler.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -4,7 +4,10 @@

#include <assert.h>

#include "../dolphin/CommonFuncs.h"

#ifdef _WIN32
#include <windows.h>
#else
#include <sys/mman.h>
#include <unistd.h>
Expand Down Expand Up @@ -32,8 +35,6 @@ const int RegisterCache<Compiler, X64Reg>::NativeRegsAvailable =
#endif
;

int instructionPopularityARM[ARMInstrInfo::ak_Count];

/*
We'll repurpose this .bss memory
Expand All @@ -42,29 +43,33 @@ u8 CodeMemory[1024 * 1024 * 32];

Compiler::Compiler()
{
#ifdef _WIN32
#else
u64 pagesize = sysconf(_SC_PAGE_SIZE);
#endif

u8* pageAligned = (u8*)(((u64)CodeMemory & ~(pagesize - 1)) + pagesize);
u64 alignedSize = (((u64)CodeMemory + sizeof(CodeMemory)) & ~(pagesize - 1)) - (u64)pageAligned;

#ifdef _WIN32
#else
mprotect(pageAligned, alignedSize, PROT_EXEC | PROT_READ | PROT_WRITE);
#endif

region = pageAligned;
region_size = alignedSize;
total_region_size = region_size;
{
#ifdef _WIN32
SYSTEM_INFO sysInfo;
GetSystemInfo(&sysInfo);

u64 pageSize = (u64)sysInfo.dwPageSize;
#else
u64 pageSize = sysconf(_SC_PAGE_SIZE);
#endif

u8* pageAligned = (u8*)(((u64)CodeMemory & ~(pageSize - 1)) + pageSize);
u64 alignedSize = (((u64)CodeMemory + sizeof(CodeMemory)) & ~(pageSize - 1)) - (u64)pageAligned;

#ifdef _WIN32
DWORD dummy;
VirtualProtect(pageAligned, alignedSize, PAGE_EXECUTE_READWRITE, &dummy);
#else
mprotect(pageAligned, alignedSize, PROT_EXEC | PROT_READ | PROT_WRITE);
#endif

region = pageAligned;
region_size = alignedSize;
total_region_size = region_size;
}

ClearCodeSpace();

SetCodePtr(pageAligned);

memset(instructionPopularityARM, 0, sizeof(instructionPopularityARM));

for (int i = 0; i < 3; i++)
{
for (int j = 0; j < 2; j++)
Expand Down Expand Up @@ -118,7 +123,7 @@ Compiler::Compiler()
SetJumpTarget(und);
MOV(32, R(ABI_PARAM3), MComplex(RCPU, ABI_PARAM2, SCALE_4, offsetof(ARM, R_UND)));
RET();
}
}
{
// RSCRATCH mode
// ABI_PARAM2 reg n
Expand Down Expand Up @@ -163,7 +168,10 @@ Compiler::Compiler()
RET();
}

ResetStart = (void*)GetWritableCodePtr();
// move the region forward to prevent overwriting the generated functions
region_size -= GetWritableCodePtr() - region;
total_region_size = region_size;
region = GetWritableCodePtr();
}

void Compiler::LoadCPSR()
Expand Down Expand Up @@ -338,7 +346,7 @@ const Compiler::CompileFunc T_Comp[ARMInstrInfo::tk_Count] = {

void Compiler::Reset()
{
SetCodePtr((u8*)ResetStart);
ClearCodeSpace();
}

CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrsCount)
Expand Down Expand Up @@ -375,9 +383,6 @@ CompiledBlock Compiler::CompileBlock(ARM* cpu, FetchedInstr instrs[], int instrs
? T_Comp[CurInstr.Info.Kind]
: A_Comp[CurInstr.Info.Kind];

if (!Thumb)
instructionPopularityARM[CurInstr.Info.Kind] += comp == NULL;

if (comp == NULL || i == instrsCount - 1)
{
MOV(32, MDisp(RCPU, offsetof(ARM, R[15])), Imm32(R15));
Expand Down
1 change: 0 additions & 1 deletion src/ARMJIT_x64/ARMJIT_Compiler.h
Original file line number Diff line number Diff line change
Expand Up @@ -132,7 +132,6 @@ class Compiler : public Gen::X64CodeBlock
return Gen::R(RegCache.Mapping[reg]);
}

void* ResetStart;
void* MemoryFuncs9[3][2];
void* MemoryFuncs7[3][2][2];

Expand Down
25 changes: 14 additions & 11 deletions src/CMakeLists.txt
Original file line number Diff line number Diff line change
Expand Up @@ -49,19 +49,22 @@ add_library(core STATIC
WifiAP.cpp

tiny-AES-c/aes.c
)

ARMJIT.cpp
ARMJIT_x64/ARMJIT_Compiler.cpp
ARMJIT_x64/ARMJIT_ALU.cpp
ARMJIT_x64/ARMJIT_LoadStore.cpp
ARMJIT_x64/ARMJIT_Branch.cpp
if (ENABLE_JIT)
target_sources(core PRIVATE
ARMJIT.cpp
ARMJIT_x64/ARMJIT_Compiler.cpp
ARMJIT_x64/ARMJIT_ALU.cpp
ARMJIT_x64/ARMJIT_LoadStore.cpp
ARMJIT_x64/ARMJIT_Branch.cpp

dolphin/CommonFuncs.cpp
dolphin/x64ABI.cpp
dolphin/x64CPUDetect.cpp
dolphin/x64Emitter.cpp
dolphin/MemoryUtil.cpp
)
dolphin/CommonFuncs.cpp
dolphin/x64ABI.cpp
dolphin/x64CPUDetect.cpp
dolphin/x64Emitter.cpp
)
endif()

if (WIN32)
target_link_libraries(core ole32 comctl32 ws2_32 opengl32)
Expand Down
12 changes: 10 additions & 2 deletions src/CP15.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -813,7 +813,9 @@ void ARMv5::DataWrite8(u32 addr, u8 val)
{
DataCycles = 1;
*(u8*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
Expand All @@ -835,7 +837,9 @@ void ARMv5::DataWrite16(u32 addr, u16 val)
{
DataCycles = 1;
*(u16*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
Expand All @@ -857,8 +861,10 @@ void ARMv5::DataWrite32(u32 addr, u32 val)
{
DataCycles = 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr + 2) & 0x7FFF) >> 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
Expand All @@ -880,8 +886,10 @@ void ARMv5::DataWrite32S(u32 addr, u32 val)
{
DataCycles += 1;
*(u32*)&ITCM[addr & 0x7FFF] = val;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2] = NULL;
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) / 2 + 1] = NULL;
#ifdef JIT_ENABLED
ARMJIT::cache.ARM9_ITCM[(addr & 0x7FFF) >> 1] = NULL;
ARMJIT::cache.ARM9_ITCM[((addr & 0x7FFF) >> 1) + 1] = NULL;
#endif
return;
}
if (addr >= DTCMBase && addr < (DTCMBase + DTCMSize))
Expand Down
4 changes: 4 additions & 0 deletions src/Config.cpp
Original file line number Diff line number Diff line change
Expand Up @@ -37,8 +37,10 @@ char DSiBIOS7Path[1024];
char DSiFirmwarePath[1024];
char DSiNANDPath[1024];

#ifdef JIT_ENABLED
bool JIT_Enable = false;
int JIT_MaxBlockSize = 12;
#endif

ConfigEntry ConfigFile[] =
{
Expand All @@ -51,8 +53,10 @@ ConfigEntry ConfigFile[] =
{"DSiFirmwarePath", 1, DSiFirmwarePath, 0, "", 1023},
{"DSiNANDPath", 1, DSiNANDPath, 0, "", 1023},

#ifdef JIT_ENABLED
{"JIT_Enable", 0, &JIT_Enable, 0, NULL, 0},
{"JIT_MaxBlockSize", 0, &JIT_MaxBlockSize, 10, NULL, 0},
#endif

{"", -1, NULL, 0, NULL, 0}
};
Expand Down
2 changes: 2 additions & 0 deletions src/Config.h
Original file line number Diff line number Diff line change
Expand Up @@ -51,8 +51,10 @@ extern char DSiBIOS7Path[1024];
extern char DSiFirmwarePath[1024];
extern char DSiNANDPath[1024];

#ifdef JIT_ENABLED
extern bool JIT_Enable;
extern int JIT_MaxBlockSize;
#endif

}

Expand Down
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