- A reconfigurable image acquisistion and processing core which supports MIPI CSI-2 protocol.
The core supports the following configurations
- 1, 2, or 4 lane configuration
- 1, 2, or 4 pixel per clock output
- Supports YUV422_8, RGB888, RGB565, RAW8, RAW10 datatypes
- Supports demosaicing for RGGB, BGGR, GRBG, or GBRG Bayer patterns
- Programmability through AXI slave interface
- Simple AXI master with programmable destination address for the pixel stream
- build: A temporary directory created during the HW build flow. Contains logs and temporary artefacts.
- .bender: A temporary directory used by Bender to provide a local checkout for necessary IPs
- doc: Documents/Figures.
- fpga: FPGA prototyping script + artefacts
- src: RTL and TB sources specific to this repository
- vsim: Artefacts related to Questa simulation flow
The following RTL simulation tools are supported with the versions specified:
- Questasim 10.7g
Initialise the project repo + submodules by using the command:
make repository_init
All build files can be deleted using the command:
make clean
Questasim is the primary tool used for verification. The following commands are used to compile the RTL:
make compile elaborate
Use the following commands to run the simulation in CLI
make run_test VLOG_DEFS=+define+PIC_TEST # runs simulation for an input picture
make run_test VLOG_DEFS=+define+REG_SANITY_TEST # runs simulation for register accesses
🚧 Under Construction 🚧
Project development should be done via feature branches. Merge branches to main often. For fluent merge housekeeping do following. From settings -> Merge requests:
-
Enable "delete source branch" option by default: Yes (checkmark the box)
-
Squash commits when merging: Encourage or Require. This will clean up main branch history by huge amount.
-
Merge checks: Pipelines must succeed: Yes
-
Merge checks: Skipped pipelines are considered successfull: No
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Merge checks: All threads must be resolved: Yes
Merges should be always reviewed and accepted by another developer.
All documentation will be hosted on pages: https://soc-hub.gitlab-pages.tuni.fi/ss-template
After setting up repo to run CI, replace ss-template with your repo path, generally follows pattern: chip/type/module. Alternatively you can find it from: deploy-> pages.
Additionally, check settings -> general: pages is enabled with option "Only Project Members"
To ensure issueless operation for CI, ensure that settings -> CI/CD has following settings:
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Auto-cancel redundant pipelines: Yes
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Git strategy: git clone
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Git shallow clone: 1
- Available group runner: tie-sochub-gitlabrunner-ci (if missing contact [email protected] and/or [email protected])
- Limit access: No (it would prevent hiearchical repository access in CI)
Insert source / authors / licences / acknowledgements as deemed needed