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verification_plan.md

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CSI Verification

Degrees of Freedom:

  • 4, 2 or 1 lanes
  • 4, 2 or 1 Pixel Per Clock configuration
  • RAW8, RAW10, RGB888, RGB656, YUV422 datatypes
  • Virtual channel and data type interleaving
  • Bayer filter types in case of RAW datatype tests (RGGB, BGGR, GBRG, GRBG)
  • Lane aligner depth verification
  • ECC and CRC error checks
  • Interrupts (not sure how many)

Legend for Status and On Pipeline colums

Status Icon
Passing ✔️
Failing
Not Implemented
On Pipelines Icon
Test runs always
Push, Merge Request, Night, and Weekly
Test runs on Merge Requests, Nightly, and Weekly ⤴️
Test runs on Nightly and Weekly only 🌃
Test runs on Weekly only 📆
Test is not on CI Pipeline ✖️

Single-core general tests

Test Name Description Status On Pipeline
extmem64bit Simple read & write 64-bit data ✔️
atomic_fetchxor64bit 64-bit atomic fetch-and-XOR test ✔️
extmem32bit Simple read & write 32-bit data ✔️ ⤴️
extmem16bit Simple read & write 16-bit data ✔️ ⤴️
extmem8bit Simple read & write 8-bit data ✔️ ⤴️
atomic_swap64bit 64-bit atomic swap test ✔️ ⤴️
atomic_fetchadd64bit 64-bit atomic fetch-and-add test ✔️ 🌃
atomic_fetchand64bit 64-bit atomic fetch-and-AND test ✔️ 🌃
atomic_fetchor64bit 64-bit atomic fetch-and-OR test ✔️ 🌃
atomic_fetchadd32bit 32-bit atomic fetch-and-add test ✔️ 🌃
atomic_fetchand32bit 32-bit atomic fetch-and-AND test ✔️ 🌃
atomic_fetchor32bit 32-bit atomic fetch-and-OR test ✔️ 🌃
atomic_fetchxor32bit 32-bit atomic fetch-and-XOR test ✔️ 🌃
atomic_swap32bit 32-bit atomic swap test ✔️ 🌃
doubles Floating point test with 64-bit doubles ✔️ 🌃
doubles_conv Floating point test with 64-bit doubles, includes type conversions ✔️ 🌃
floats_conv Floating point test with 32-bit floats, includes type conversions ✔️ 🌃
floats Floating point test with 32-bit floats ✔️ 🌃
lfsr8bit Linear-feedback shift register test with 8-bit register ✔️ 📆
lfsr16bit Linear-feedback shift register test with 16-bit register ✔️ 📆
lfsr16bit_fence Linear-feedback shift register test with 16-bit register, also includes fence operations ✔️ 📆
lfsr16bit_fence_i Linear-feedback shift register test with 16-bit register, also includes fence operations ✔️ 📆
lfsr64bit_x300 Linear-feedback shift register test with 64-bit register, 300 iterations ✔️ 📆
lfsr64bit_x2000 Linear-feedback shift register test with 64-bit register, 2000 iterations ✔️ ✖️
cache_evict8bit_rand_mm 8-bit cache evict test ✔️ 📆
cache_evict32bit_rand_mm 32-bit cache evict test ✔️ 📆
cache_evict64bit_rand_mm 64-bit cache evict test ✔️ 📆
cache_evict16bit_rand_mm 16-bit cache evict test ✔️ 📆