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unification with aarch64 continues
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@michalsc
michalsc committed Jan 23, 2020
1 parent 86d138b commit 78cfe73
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Showing 4 changed files with 112 additions and 14 deletions.
11 changes: 11 additions & 0 deletions Include/M68k.h
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Original file line number Diff line number Diff line change
Expand Up @@ -84,6 +84,17 @@ struct M68KState
#define SR_T0 0x4000
#define SR_T1 0x8000

#define SRB_C 0
#define SRB_V 1
#define SRB_Z 2
#define SRB_N 3
#define SRB_X 4
#define SRB_IPL 8
#define SRB_M 12
#define SRB_S 13
#define SRB_T0 14
#define SRB_T1 15

#define M_CC_T 0x00
#define M_CC_F 0x01
#define M_CC_HI 0x02
Expand Down
93 changes: 89 additions & 4 deletions M68k_LINE4.c
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Original file line number Diff line number Diff line change
Expand Up @@ -7,7 +7,7 @@
with this file, You can obtain one at http://mozilla.org/MPL/2.0/.
*/

#include "ARM.h"
#include "support.h"
#include "M68k.h"
#include "RegisterAllocator.h"

Expand Down Expand Up @@ -44,10 +44,24 @@ uint32_t *EMIT_CLR(uint32_t *ptr, uint16_t opcode, uint16_t **m68k_ptr)

if (update_mask)
{
#ifdef __aarch64__
uint8_t cc = RA_ModifyCC(&ptr);
uint8_t tmp = RA_AllocARMRegister(&ptr);
if (update_mask & ~SR_Z) {
*ptr++ = mov_immed_u16(tmp, update_mask, 0);
*ptr++ = bic_reg(cc, cc, tmp, LSL, 0);
}
if (update_mask & SR_Z) {
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_Z) & 31);
}

RA_FreeARMRegister(&ptr, tmp);
#else
M68K_ModifyCC(&ptr);
*ptr++ = bic_immed(REG_SR, REG_SR, update_mask);
if (update_mask & SR_Z)
*ptr++ = orr_immed(REG_SR, REG_SR, SR_Z);
#endif
}
return ptr;
}
Expand Down Expand Up @@ -762,15 +776,27 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)
{
case 2: /* Byte to Word */
tmp = RA_AllocARMRegister(&ptr);
#ifdef __aarch64__
*ptr++ = sxtb(tmp, reg);
#else
*ptr++ = sxtb(tmp, reg, 0);
#endif
*ptr++ = bfi(reg, tmp, 0, 16);
RA_FreeARMRegister(&ptr, tmp);
break;
case 3: /* Word to Long */
#ifdef __aarch64__
*ptr++ = sxth(reg, reg);
#else
*ptr++ = sxth(reg, reg, 0);
#endif
break;
case 7: /* Byte to Long */
#ifdef __aarch64__
*ptr++ = sxtb(reg, reg);
#else
*ptr++ = sxtb(reg, reg, 0);
#endif
break;
}

Expand All @@ -781,13 +807,30 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)

if (update_mask)
{
#ifdef __aarch64__
uint8_t cc = RA_ModifyCC(&ptr);
uint8_t tmp = RA_AllocARMRegister(&ptr);
*ptr++ = mov_immed_u16(tmp, update_mask, 0);
*ptr++ = bic_reg(cc, cc, tmp, LSL, 0);
*ptr++ = cmp_reg(31, reg, LSL, 0);
if (update_mask & SR_Z) {
*ptr++ = b_cc(A64_CC_EQ ^ 1, 2);
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_Z) & 31);
}
if (update_mask & SR_N) {
*ptr++ = b_cc(A64_CC_MI, 2);
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_N) & 31);
}
RA_FreeARMRegister(&ptr, tmp);
#else
M68K_ModifyCC(&ptr);
*ptr++ = cmp_immed(tmp, 0);
*ptr++ = bic_immed(REG_SR, REG_SR, update_mask);
if (update_mask & SR_N)
*ptr++ = orr_cc_immed(ARM_CC_MI, REG_SR, REG_SR, SR_N);
if (update_mask & SR_Z)
*ptr++ = orr_cc_immed(ARM_CC_EQ, REG_SR, REG_SR, SR_Z);
#endif
}
}
/* 0100100000001xxx - LINK - 32 bit offset */
Expand All @@ -806,7 +849,11 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)
*ptr++ = str_offset_preindex(sp, reg, -4); /* SP = SP - 4; An -> (SP) */
*ptr++ = mov_reg(reg, sp);
RA_SetDirtyM68kRegister(&ptr, 8 + (opcode & 7));
#ifdef __aarch64__
*ptr++ = add_reg(sp, sp, displ, LSL, 0);
#else
*ptr++ = add_reg(sp, sp, displ, 0);
#endif
RA_SetDirtyM68kRegister(&ptr, 15);

(*m68k_ptr)+=2;
Expand All @@ -825,21 +872,41 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)
{
uint8_t reg = RA_MapM68kRegister(&ptr, opcode & 7);
RA_SetDirtyM68kRegister(&ptr, opcode & 7);
#ifdef __aarch64__
*ptr++ = ror(reg, reg, 16);
#else
*ptr++ = rors_immed(reg, reg, 16);

#endif
ptr = EMIT_AdvancePC(ptr, 2);

uint8_t mask = M68K_GetSRMask(*m68k_ptr);
uint8_t update_mask = (SR_C | SR_V | SR_Z | SR_N) & ~mask;

if (update_mask)
{
#ifdef __aarch64__
uint8_t cc = RA_ModifyCC(&ptr);
uint8_t tmp = RA_AllocARMRegister(&ptr);
*ptr++ = mov_immed_u16(tmp, update_mask, 0);
*ptr++ = bic_reg(cc, cc, tmp, LSL, 0);
*ptr++ = cmp_reg(31, reg, LSL, 0);
if (update_mask & SR_Z) {
*ptr++ = b_cc(A64_CC_EQ ^ 1, 2);
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_Z) & 31);
}
if (update_mask & SR_N) {
*ptr++ = b_cc(A64_CC_MI, 2);
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_N) & 31);
}
RA_FreeARMRegister(&ptr, tmp);
#else
M68K_ModifyCC(&ptr);
*ptr++ = bic_immed(REG_SR, REG_SR, update_mask);
if (update_mask & SR_N)
*ptr++ = orr_cc_immed(ARM_CC_MI, REG_SR, REG_SR, SR_N);
if (update_mask & SR_Z)
*ptr++ = orr_cc_immed(ARM_CC_EQ, REG_SR, REG_SR, SR_Z);
#endif
}
}
/* 0100100001001xxx - BKPT */
Expand Down Expand Up @@ -911,7 +978,11 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)
*ptr++ = str_offset_preindex(sp, reg, -4); /* SP = SP - 4; An -> (SP) */
*ptr++ = mov_reg(reg, sp);
RA_SetDirtyM68kRegister(&ptr, 8 + (opcode & 7));
#ifdef __aarch64__
*ptr++ = add_reg(sp, sp, displ, LSL, 0);
#else
*ptr++ = add_reg(sp, sp, displ, 0);
#endif
RA_SetDirtyM68kRegister(&ptr, 15);

(*m68k_ptr)++;
Expand Down Expand Up @@ -979,7 +1050,11 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)
pc_off = 2;
ptr = EMIT_GetOffsetPC(ptr, &pc_off);
*ptr++ = ldrsh_offset(REG_PC, tmp, pc_off);
#ifdef __aarch64__
*ptr++ = add_reg(sp, sp, tmp, LSL, 0);
#else
*ptr++ = add_reg(sp, sp, tmp, 0);
#endif
ptr = EMIT_ResetOffsetPC(ptr);
*ptr++ = mov_reg(REG_PC, tmp2);
RA_SetDirtyM68kRegister(&ptr, 15);
Expand Down Expand Up @@ -1022,20 +1097,30 @@ uint32_t *EMIT_line4(uint32_t *ptr, uint16_t **m68k_ptr)
else if (opcode == 0x4e77)
{
uint8_t tmp = RA_AllocARMRegister(&ptr);
uint8_t mask = RA_AllocARMRegister(&ptr);
uint8_t sp = RA_MapM68kRegister(&ptr, 15);

/* Fetch status byte from stack */
M68K_ModifyCC(&ptr);
*ptr++ = ldrh_offset_postindex(sp, tmp, 2);
#ifdef __aarch64__
uint8_t cc = RA_ModifyCC(&ptr);
*ptr++ = mov_immed_u16(mask, 0x1f, 0);
*ptr++ = bic_reg(cc, cc, mask, LSL, 0);
*ptr++ = and_reg(tmp, tmp, mask, LSL, 0);
*ptr++ = orr_reg(cc, cc, tmp, LSL, 0);
#else
M68K_ModifyCC(&ptr);
*ptr++ = bic_immed(REG_SR, REG_SR, 0x1f);
*ptr++ = bic_immed(tmp, tmp, 0x1f);
*ptr++ = and_immed(tmp, tmp, 0x1f);
*ptr++ = orr_reg(REG_SR, REG_SR, tmp, 0);
#endif
/* Fetch return address from stack */
*ptr++ = ldr_offset_postindex(sp, tmp, 4);
ptr = EMIT_ResetOffsetPC(ptr);
*ptr++ = mov_reg(REG_PC, tmp);
RA_SetDirtyM68kRegister(&ptr, 15);
*ptr++ = INSN_TO_LE(0xffffffff);
RA_FreeARMRegister(&ptr, mask);
RA_FreeARMRegister(&ptr, tmp);
}
/* 010011100111101x - MOVEC */
Expand Down
20 changes: 11 additions & 9 deletions M68k_MOVE.c
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Original file line number Diff line number Diff line change
Expand Up @@ -74,7 +74,11 @@ uint32_t *EMIT_move(uint32_t *ptr, uint16_t **m68k_ptr)
else
size = 2;

ptr = EMIT_LoadFromEffectiveAddress(ptr, size, &tmp_reg, opcode & 0x3f, *m68k_ptr, &ext_count, 0, NULL);
if (is_movea && size == 2) {
ptr = EMIT_LoadFromEffectiveAddress(ptr, size, &tmp_reg, opcode & 0x3f, *m68k_ptr, &ext_count, 0, NULL);
} else {
ptr = EMIT_LoadFromEffectiveAddress(ptr, size, &tmp_reg, opcode & 0x3f, *m68k_ptr, &ext_count, 1, NULL);
}

if ((opcode & 0x3f) == 0x3c) {
is_load_immediate = 1;
Expand Down Expand Up @@ -148,24 +152,22 @@ uint32_t *EMIT_move(uint32_t *ptr, uint16_t **m68k_ptr)
*ptr++ = orr_reg(cc, cc, tmp, LSL, 0);
}
} else {
*ptr++ = mov_immed_u8(tmp, 0);
switch (size)
{
case 4:
*ptr++ = cmp_reg(tmp_reg, 31, LSL, 0);
*ptr++ = cmp_reg(31, tmp_reg, LSL, 0);
break;
case 2:
*ptr++ = cmp_reg(tmp_reg, 31, LSL, 16);
*ptr++ = cmp_reg(31, tmp_reg, LSL, 16);
break;
case 1:
*ptr++ = cmp_reg(tmp_reg, 31, LSL, 24);
*ptr++ = cmp_reg(31, tmp_reg, LSL, 24);
break;
}
*ptr++ = b_cc(A64_CC_EQ ^ 1, 2);
*ptr++ = add_immed(tmp, tmp, SR_Z);
*ptr++ = b_cc(A64_CC_MI ^ 1, 2);
*ptr++ = add_immed(tmp, tmp, SR_N);
*ptr++ = orr_reg(cc, cc, tmp, LSL, 0);
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_Z) & 31);
*ptr++ = b_cc(A64_CC_MI, 2);
*ptr++ = orr_immed(cc, cc, 1, (32 - SRB_N) & 31);
}

RA_FreeARMRegister(&ptr, tmp);
Expand Down
2 changes: 1 addition & 1 deletion Makefile
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Original file line number Diff line number Diff line change
Expand Up @@ -17,7 +17,7 @@ RPI_OBJS := start_rpi.o RasPi/support_rpi.o devicetree.o tlsf.o HunkLoader.o M68

RPI64_OBJS := AArch64/start.o AArch64/mmu.o RasPi/start_rpi64.o RasPi/support_rpi.o support.o tlsf.o devicetree.o EmuLogo.o HunkLoader.o \
RegisterAllocator64.o M68k_Translator.o \
M68k_MOVE.o M68k_EA.o M68k_SR.o
M68k_MOVE.o M68k_EA.o M68k_SR.o M68k_LINE4.o

PBPRO_OBJS := AArch64/start.o PBPro/start_pbpro.o PBPro/support_pbpro.o AArch64/mmu.o support.o tlsf.o devicetree.o \
EmuLogo.o HunkLoader.o RegisterAllocator64.o
Expand Down

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