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Commits on May 19, 2021

• Regression: AmlContext: Send + Sync again.

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  92ab90a

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Commits on Sep 27, 2020

• Add specification for the I/O Port Descriptor

  michaelmelanson

  committed
  cf8be52

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• Add specification for the DMA Format Descriptor

  michaelmelanson

  committed
  8e02134

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• Tidy up irq_format_descriptor

  michaelmelanson

  committed
  0a4d4db

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• Tidy up address_space_descriptor

  michaelmelanson

  committed
  0dd0639

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• Tidy up fixed_memory_descriptor

  michaelmelanson

  committed
  f21bff4

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• Clean up the descriptor splitting code

  michaelmelanson

  committed
  11cf635

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Commits on Sep 26, 2020

• Squash resource_descriptor

  michaelmelanson

  committed
  f903c4a

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• Add EOF newline in gitignore

  michaelmelanson

  committed
  3dcc846

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• Make match arms in irq_format_descriptor make more sense

  michaelmelanson

  committed
  890dc73

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• Add slice ends on last commit

  michaelmelanson

  committed
  5791240

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• Use LittleEndian::u32 in fixed_memory_descriptor

  michaelmelanson

  committed
  7374cb3

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• Remove double newline

  michaelmelanson

  committed
  0d75565

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• Make structs Eq as well

  michaelmelanson

  committed
  33f3568

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• Wrap tests in mod tests

  michaelmelanson

  committed
  0c337b3

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• Use FDC CRS from QEMU AML

  michaelmelanson

  committed
  168236f

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• Use PCI CRS from QEMU ASL & clean up

  michaelmelanson

  committed
  0d39479

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• Use actual keyboard data

  michaelmelanson

  committed
  e262a74

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• Use exclusive bit ranges

  michaelmelanson

  committed
  c8021f9

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Commits on Sep 21, 2020

• Whitespace

  michaelmelanson

  committed
  a6e4cc9

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• Add note about why we have to do -1 in one place

  michaelmelanson

  committed
  e27ff49

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• Remove breaking changes

  michaelmelanson

  committed
  be9203d

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• Add several parsers:

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  672a693

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