mimxrt/boards/make-pins.py: Update to use tools/boardgen.py.

Minor change to remove support for using numeric IDs for machine.Pin. This was previously based on the index of the pin in the board csv, but this is different (and incompatible) with other ports. This work was funded through GitHub Sponsors. Signed-off-by: Jim Mussared <[email protected]>
swork · Nov 3, 2023 · c0b64a3 · c0b64a3
1 parent 4d568a5
commit c0b64a3
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Showing 22 changed files with 260 additions and 410 deletions.
diff --git a/ports/mimxrt/Makefile b/ports/mimxrt/Makefile
@@ -61,7 +61,6 @@ AF_FILE = boards/$(MCU_SERIES)_af.csv
 BOARD_PINS = $(BOARD_DIR)/pins.csv
 PREFIX_FILE = boards/mimxrt_prefix.c
 GEN_FLEXRAM_CONFIG_SRC = $(BUILD)/flexram_config.s
-GEN_PINS_AF_CONST = $(HEADER_BUILD)/pins_af_const.h
 GEN_PINS_HDR = $(HEADER_BUILD)/pins.h
 GEN_PINS_SRC = $(BUILD)/pins_gen.c
 

diff --git a/ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1020_EVK/mpconfigboard.h
@@ -170,10 +170,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_04
-#define ENET_INT_PIN        &pin_GPIO_AD_B1_06
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_AD_B0_08_ENET_REF_CLK1, 1, 0xB0E9u }, \
     { IOMUXC_GPIO_AD_B0_09_ENET_RDATA01, 0, 0xB0E9u }, \

diff --git a/ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1020_EVK/pins.csv
@@ -38,3 +38,12 @@ SD_RX,GPIO_AD_B1_05
 SCK_TX,GPIO_AD_B1_01
 WS_TX,GPIO_AD_B1_02
 SD_TX,GPIO_AD_B1_03
+-ENET_RESET,-GPIO_AD_B0_04
+-ENET_INT,-GPIO_AD_B1_06
+-SD_CMD,-GPIO_SD_B0_02
+-SD_CLK,-GPIO_SD_B0_03
+-SD_CD,-GPIO_SD_B0_06
+-SD_DATA0,-GPIO_SD_B0_04
+-SD_DATA1,-GPIO_SD_B0_05
+-SD_DATA2,-GPIO_SD_B0_00
+-SD_DATA3,-GPIO_SD_B0_01
diff --git a/ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1050_EVK/mpconfigboard.h
@@ -160,10 +160,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_09
-#define ENET_INT_PIN        &pin_GPIO_AD_B0_10
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

diff --git a/ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1050_EVK/pins.csv
@@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+-ENET_RESET,-GPIO_AD_B0_09
+-ENET_INT,-GPIO_AD_B0_10
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1060_EVK/mpconfigboard.h
@@ -158,10 +158,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_09
-#define ENET_INT_PIN        &pin_GPIO_AD_B0_10
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

diff --git a/ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1060_EVK/pins.csv
@@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+-ENET_RESET,-GPIO_AD_B0_09
+-ENET_INT,-GPIO_AD_B0_10
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1064_EVK/mpconfigboard.h
@@ -158,10 +158,6 @@
 #define ENET_PHY_ADDRESS    (2)
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// Etherner PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_AD_B0_09
-#define ENET_INT_PIN        &pin_GPIO_AD_B0_10
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

diff --git a/ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1064_EVK/pins.csv
@@ -36,3 +36,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+-ENET_RESET,-GPIO_AD_B0_09
+-ENET_INT,-GPIO_AD_B0_10
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/MIMXRT1170_EVK/mpconfigboard.h b/ports/mimxrt/boards/MIMXRT1170_EVK/mpconfigboard.h
@@ -155,10 +155,6 @@
 #define ENET_PHY            KSZ8081
 #define ENET_PHY_OPS        phyksz8081_ops
 
-// 10/100 Ethernet PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_LPSR_12
-#define ENET_INT_PIN        &pin_GPIO_AD_12
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_DISP_B2_06_ENET_RX_DATA00, 0, 0x06u }, \
     { IOMUXC_GPIO_DISP_B2_07_ENET_RX_DATA01, 0, 0x06u }, \

diff --git a/ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv b/ports/mimxrt/boards/MIMXRT1170_EVK/pins.csv
@@ -57,3 +57,13 @@ SD_RX,GPIO_AD_20
 SCK_TX,GPIO_AD_22
 WS_TX,GPIO_AD_23
 SD_TX,GPIO_AD_21
+
+-ENET_RESET,-GPIO_LPSR_12
+-ENET_INT,-GPIO_AD_12
+-ENET_1_RESET,-GPIO_DISP_B2_13
+-SD_CMD,-GPIO_SD_B1_00
+-SD_CLK,-GPIO_SD_B1_01
+-SD_DATA0,-GPIO_SD_B1_02
+-SD_DATA1,-GPIO_SD_B1_03
+-SD_DATA2,-GPIO_SD_B1_04
+-SD_DATA3,-GPIO_SD_B1_05
diff --git a/ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h b/ports/mimxrt/boards/SEEED_ARCH_MIX/mpconfigboard.h
@@ -127,11 +127,6 @@
 #define ENET_PHY_OPS        phylan8720_ops
 #define ENET_TX_CLK_OUTPUT  false
 
-// Etherner PIN definitions
-// No reset and interrupt pin by intention
-#define ENET_RESET_PIN      NULL
-#define ENET_INT_PIN        NULL
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

diff --git a/ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv b/ports/mimxrt/boards/SEEED_ARCH_MIX/pins.csv
@@ -9,7 +9,7 @@ J3_11,GPIO_B1_07
 J3_12,GPIO_B1_09
 J3_13,GPIO_B1_10
 J3_14,GPIO_AD_B0_14
-J3_15,GPO_AD_B0_15
+J3_15,GPIO_AD_B0_15
 J3_16,GPIO_AD_B1_00
 J3_17,GPIO_AD_B1_01
 J3_19,GPIO_AD_B0_13
@@ -67,3 +67,13 @@ SD_RX,GPIO_AD_B1_12
 SCK_TX,GPIO_AD_B1_14
 WS_TX,GPIO_AD_B1_15
 SD_TX,GPIO_AD_B1_13
+
+# No ethernet reset and interrupt pin by intention
+
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_CD_B,-GPIO_B1_12
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05
diff --git a/ports/mimxrt/boards/TEENSY41/mpconfigboard.h b/ports/mimxrt/boards/TEENSY41/mpconfigboard.h
@@ -125,10 +125,6 @@
 #define ENET_PHY_ADDRESS    (0)
 #define ENET_PHY_OPS        phydp83825_ops
 
-// Ethernet PIN definitions
-#define ENET_RESET_PIN      &pin_GPIO_B0_14
-#define ENET_INT_PIN        &pin_GPIO_B0_15
-
 #define IOMUX_TABLE_ENET \
     { IOMUXC_GPIO_B1_04_ENET_RX_DATA00, 0, 0xB0E9u }, \
     { IOMUXC_GPIO_B1_05_ENET_RX_DATA01, 0, 0xB0E9u }, \

diff --git a/ports/mimxrt/boards/TEENSY41/pins.csv b/ports/mimxrt/boards/TEENSY41/pins.csv
@@ -88,3 +88,12 @@ SD_RX,GPIO_B1_00
 SCK_TX,GPIO_EMC_06
 WS_TX,GPIO_EMC_05
 SD_TX,GPIO_EMC_04
+
+-ENET_RESET,-GPIO_B0_14
+-ENET_INT,-GPIO_B0_15
+-SD_CMD,-GPIO_SD_B0_00
+-SD_CLK,-GPIO_SD_B0_01
+-SD_DATA0,-GPIO_SD_B0_02
+-SD_DATA1,-GPIO_SD_B0_03
+-SD_DATA2,-GPIO_SD_B0_04
+-SD_DATA3,-GPIO_SD_B0_05