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icestick.pcf
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# -----------------------------------------------------------------------------
#- Icestick constraint file (.pcf)
#- By Juan Gonzalez (Obijuan)
#- April - 2016
#- GPL license
# -----------------------------------------------------------------------------
# -- Pinout: https://github.com/Obijuan/open-fpga-verilog-tutorial/blob/master/tutorial/doc/images/icestick_pinout.png
# -- Guide: https://github.com/Obijuan/open-fpga-verilog-tutorial/blob/master/tutorial/doc/icestickusermanual.pdf
# -- Icestick leds map
#
# D1
# D4 D5 D2
# D3
#
# -- D1-D4: Red leds
# -- D5: green led
# ------------ Red leds ------------------------------------------------------
set_io --nowarn D1 99
set_io --nowarn D2 98
set_io --nowarn D3 97
set_io --nowarn D4 96
# ------------ Green led -----------------------------------------------------
set_io --nowarn D5 95
# ------------ IrDA ----------------------------------------------------------
set_io --nowarn IrDA_TX 105
set_io --nowarn IrDA_RX 106
#-- SD = 0, enable IrDA
set_io --nowarn SD 107
# ------------ PMOD connector ------------------------------------------------
#
# Pmod standar numeration (Oriented according the icestick, with the
# usb connector pointing to the left and IRda to the right)
#
# --------
# | 12 6 |
# | 11 5 |
# | 10 4 |
# | 9 3 |
# | 8 2 |
# | 7 1 | <
# --------
#
# FPGA pins:
#
# ----------
# | 3V3 3V3 |
# | GND GND |
# | 91 81 |
# | 90 80 |
# | 88 79 |
# | 87 78 | <
# ----------
#
set_io --nowarn PMOD1 78
set_io --nowarn PMOD2 79
set_io --nowarn PMOD3 80
set_io --nowarn PMOD4 81
set_frequency PMOD4 200
set_io --nowarn PMOD7 87
set_io --nowarn PMOD8 88
set_io --nowarn PMOD9 90
set_io --nowarn PMOD10 91
# ------------------------ EXPANSION I/O ------------------------------------
#
# -- Numeration
#
# Top Row (TR):
# v
# --------------------------------
# | 10 9 8 7 6 5 4 3 2 1 |
# --------------------------------
#
# Bottom Row (BR):
#
# v
# --------------------------------
# | 10 9 8 7 6 5 4 3 2 1 |
# --------------------------------
#
# --- FPGA pins
#
# Top Row (TR)
# v
# --------------------------------------------------
# | 119 118 117 116 115 114 113 112 GND 3v3 |
# --------------------------------------------------
#
#
# Bottom Row (BR)
#
# v
# -------------------------------------------------
# | 44 45 47 48 56 60 61 62 GND 3v3 |
# -------------------------------------------------
#
# -- Top Row
set_io --nowarn TR3 112
set_io --nowarn TR4 113
set_io --nowarn TR5 114
set_io --nowarn TR6 115
set_io --nowarn TR7 116
set_io --nowarn TR8 117
set_io --nowarn TR9 118
set_io --nowarn TR10 119
#
# -- Bottom Row
set_io --nowarn BR3 62
set_io --nowarn BR4 61
set_io --nowarn BR5 60
set_io --nowarn BR6 56
set_io --nowarn BR7 48
set_io --nowarn BR8 47
set_io --nowarn BR9 45
set_io --nowarn BR10 44
# -------------------------- SYSTEM CLOCK ------------------------------------
set_io --nowarn CLK 21
# -------------------------- FTDI --------------------------------------------
# --- FTDI 0:
set_io --nowarn RES 66
set_io --nowarn DONE 65
set_io --nowarn SS 71
set_io --nowarn MISO 67
set_io --nowarn MOSI 68
set_io --nowarn SCK 70
#
# --- FTDI 1: (Serial port)
set_io --nowarn DCD 1
set_io --nowarn DSR 2
set_io --nowarn DTR 3
set_io --nowarn CTS 4
set_io --nowarn RTS 7
set_io --nowarn TX 8
set_io --nowarn RX 9