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[virtio] Fix r/w to PCI configuration area on big endian platforms
In legacy VirtIO drivers, the header must be PCI endianness (little) and the device-specific region is encoded in the native endian of the guest. This patch makes the access (read/write) to VirtIO header using the little endian order. Other read and write access are native endianness. This also sets the device's IO region as big endian if on big endian machine. PR: 205178 Submitted by: Andre Silva <[email protected]> Reported by: Kenneth Salerno <[email protected]> Reviewed by: bryanv, bdragon, luporl, alfredo Approved by: jhibbits (mentor) Differential Revision: https://reviews.freebsd.org/D23401
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