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⭐ Artificial intelligence
It includes Machine Learning (ML) algorithms for supervised and unsupervised learning.⭐ Embedded Systems
Related hardware systems based on Microcontrollers and Microprocessors: RiscV, ARM cortex A and Cortex M. Also included are RT-Thread and FreeRTOS.⭐ Field Programmable Gate Array
Related to the use of the Field-Programmable Gate Array (FPGA) both in development of digital systems and architectures based on softprocessor.⭐ Human Machine Interaction HMI
Related to Brain Computer Interface (BCI), Classification of Electromyography (EMG) signals, Classification of Electroencephalography (EEG) signals.⭐ Open-Source Hardware
Related to the design of Printed Circuit Boards (PCB), with special emphasis on the design of the schematic and the layers of the PCBs.⭐ Open-Source Processor
Related to the use of open source processors, including soft processors designed in FPGA. The main architecture is RISC-ISA such as RISC-V.RISCV-EC
This study introduces the design of the first Ecuadorian open-source softprocessor, RISCV-EC, based on the single-core RISC-V architecture.Stars
Konata is an instruction pipeline visualizer for Onikiri2-Kanata/Gem5-O3PipeView formats. You can download the pre-built binaries from https://github.com/shioyadan/Konata/releases
The LLVM Project is a collection of modular and reusable compiler and toolchain technologies.
A matrix extension proposal for AI applications under RISC-V architecture
The PULP Ara is a 64-bit Vector Unit, compatible with the RISC-V Vector Extension Version 1.0, working as a coprocessor to CORE-V's CVA6 core
Infrastructure to enable deployment of ML models to low-power resource-constrained embedded targets (including microcontrollers and digital signal processors).
Spatz is a compact RISC-V-based vector processor meant for high-performance, small computing clusters.
Working draft of the proposed RISC-V V vector extension
A reconfigurable and extensible VLIW processor implemented in VHDL
Vector processor for RISC-V vector ISA
GNU toolchain for RISC-V, including GCC
Release of stream-specialization software/hardware stack.
Tracking RISC-V Actions on Education, Training, Courses, Monitorships, etc.
The CORE-V CVA6 is an Application class 6-stage RISC-V CPU capable of booting Linux
Liberacion de codigo de MatLab utilizado en el proyecto "Modelo de Prediccion de Demanda de Energia Electrica de una Subestacion de CNEL EP Unidad de Negocio Esmeraldas"
diseño basico de un una arquitectura de rv32i en vhdl
Curso para aprender el lenguaje de programación Python desde cero y para principiantes. 100 clases, 44 horas en vídeo, código, proyectos y grupo de chat. Fundamentos, frontend, backend, testing, IA...
Adaptive PI controller based on a reinforcement learning algorithm for speed control of a DC motor
A fully-integrated FT8 protocol receiver on 130nm CMOS
RT-Thread is an open source IoT Real-Time Operating System (RTOS).
Preprocessing and classify EMG signals, using Tensorflow and Tensorflow Lite to deploy an AI model in a ESP32C3
la idea es generar un modelo de prediccion apartir de datos plantares para posterior uso en ortesis o protesis
Discover pretrained models for deep learning in MATLAB