ODIN-II headers correction

ODIN_II/SRC/BLIF.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,8 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file the definition of the BLIF class constructor, destructor
  */
 
 #include "BLIF.hpp"

ODIN_II/SRC/BLIFElaborate.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,14 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file a netlist traversal phase newly added to Odin-II techmap.
- * Basically, this file includes the resolve_XXX_node routines to
- * make high-level netlist nodes compatible with Odin-II partial 
- * mapper. However, the instantiation process of operations that 
- * aren't supported by Odin-II synthesis flow is also implemented
- * in this phase. 
- * E.g. Division (constant, variable), Exponentiation (variable) 
  */
 
 #include <string.h>

ODIN_II/SRC/BLIFReader.cpp

@@ -1,5 +1,6 @@
-/**
- *
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
+ * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
  * files (the "Software"), to deal in the Software without
@@ -20,14 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: includes the definition of BLIF Reader class to read a given
- * BLIF file. The Odin-II BLIF Reader can also read large files since 
- * it read each file with a BLIF_READ_BUFFER chunk or line by line.
- * Odin-II BLIF Reader caches the read models while traversing the
- * BLIF file to avoid searching the BLIF file looking for the model 
- * definition. Moreover, function getbline provides developers with 
- * the ability to read a BLIF file line by line or using a chunk.
  */
 
 #include <stdlib.h>

ODIN_II/SRC/BLIFWriter.cpp

@@ -1,4 +1,6 @@
-/**
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
+ * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
  * files (the "Software"), to deal in the Software without
@@ -19,12 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: definition of BLIF Writer routine to generate a BLIF output 
- * file. Unlike other tools that print each BLIF record in a single 
- * line, Odin-II BLIF Writer prints BLIF records in a specified size. 
- * That means it makes the BLIF file more readable by splitting the 
- * line by the specified threshold. 
  */
 
 #include <stdlib.h>

ODIN_II/SRC/BitwiseOps.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2022 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,9 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file provides utilities to modify the bitwise nodes 
- * to make them compatible with the Odin-II partial mapper.
  */
 
 #include <cmath> // log2

ODIN_II/SRC/BlockMemories.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,17 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file includes the definitions of the routines to map 
- * block memories to VTR compatible memory types, i.e., Single Port RAM 
- * and Dual Port RAM. The definition of block memory and read-only memory
- * is provided in techlib directory in the Odin-II root directory. 
- * Basically, a memory block with both read and write accesses that has a
- * separate port for each operation is called BRAM. While following the 
- * same definition, a read-only memory block is referred to as a BRAM that
- * has only read access (even multiple accesses). This function also 
- * includes ymem block support which somehow represents the Yosys internal
- * memory cell.
  */
 
 #include <string.h>

ODIN_II/SRC/CaseEqual.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,10 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: this file includes the circuitry implementation of case_equal 
- * and case_not_equal high-level netlist nodes. The implementations 
- * are XNOR, AND and invertor gates based. 
  */
 
 #include "CaseEqual.hpp"

ODIN_II/SRC/Division.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,13 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- *
- * @file Division.cpp comprises the combinational implementation of 
- * Division operation using shift and subtraction nodes. To utilize
- * this routine of this file, a high-level RTL DIV node is required
- * with port order according to what is mentioned in resolve_div_node.
- * Currently, this file is used by Yosys generated division sub-circuit.
  */
 
 #include "Division.hpp"

ODIN_II/SRC/FlipFlop.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,17 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file includes the circuitry implementation of six synchronous
- * Data Flip-Flop models. All control signals will be check based on their 
- * polarity specified in the attribute structure of the related node.
- * SDFF: A DFF with synchronous reset 
- * DFFE: A DFF with enable signal
- * SDFFE: A DFF with enabling and synchronous signals
- * SDFFCE: A DFF with enable signal prior to the synchronous reset 
- * (enable needs to be active to be able to reset)
- * DFFSR: A DFF with set (VCC) and clear (GND) signals
- * DFFSRE: A DFF with the set (VCC), clear (GND), and enable signals
  */
 
 #include "FlipFlop.hpp"

ODIN_II/SRC/GenericIO.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,9 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: this file provides the definition of abstract methods of
- * Odin-II Generic IO class.
  */
 
 #include "GenericIO.hpp"

ODIN_II/SRC/GenericReader.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,10 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file provides the definition of Odin-II Generic Reader routines.
- * The Generic Reader detects the language type and calls the required routines
- * of the related class.
  */
 
 #include "GenericReader.hpp"

ODIN_II/SRC/GenericWriter.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,10 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file provides the definition of Odin-II Generic Writer routines.
- * The Generic Writer detects the language type and calls the required routines
- * of the related class.
  */
 
 #include "GenericWriter.hpp"

ODIN_II/SRC/HardSoftLogicMixer.cpp

@@ -1,4 +1,6 @@
 /*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
+ * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
  * files (the "Software"), to deal in the Software without
@@ -20,6 +22,7 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
  */
+
 #include "HardSoftLogicMixer.hpp"
 
 #include <stdint.h> // INT_MAX

ODIN_II/SRC/Hashtable.cpp

@@ -1,4 +1,6 @@
 /*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
+ * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
  * files (the "Software"), to deal in the Software without
@@ -20,6 +22,7 @@
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
  */
+
 #include <string.h>
 #include <stdio.h>
 #include <stdlib.h>

ODIN_II/SRC/Latch.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,14 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file includes the circuitry implementation of dlatch, 
- * dlatch with asynchronous reset and a set-reset node.All control
- * signals will be check based on their polarity specified in the 
- * attribute structure of the related node.
- * DLATCH: a dlatch with enable control signal
- * ADLATCH: dlatch with asynchronous reset
- * SETCLR: set (VCC), and clear (GND) to output
  */
 
 #include "Latch.hpp"

ODIN_II/SRC/LogicalOps.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,9 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file provides utilities to modify the logical nodes 
- * to make them compatible with the Odin-II partial mapper.
  */
 
 #include "LogicalOps.hpp"

ODIN_II/SRC/MixingOptimization.cpp

@@ -1,4 +1,6 @@
 /*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
+ * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
  * files (the "Software"), to deal in the Software without

ODIN_II/SRC/Modulo.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,11 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: This file provides the resolving process for the modulo 
- * node which exactly the same as division. The only different 
- * remainder output signal is taken instead of the quotient signal 
- * for the modulo node. 
  */
 
 #include "Modulo.hpp"

ODIN_II/SRC/Multiplexer.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,11 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: this file provides utils to modify the multiplexer node 
- * to make it compatible with the Odin-II partial mapper. Moreover,
- * it includes the circuitry implementation of pmux, a cell designed
- * for parallel cases
  */
 
 #include "Multiplexer.hpp"

ODIN_II/SRC/Power.cpp

@@ -1,5 +1,5 @@
-/**
- * Copyright (c) 2021 Seyed Alireza Damghani ([email protected])
+/*
+ * Copyright 2023 CAS—Atlantic (University of New Brunswick, CASA)
  * 
  * Permission is hereby granted, free of charge, to any person
  * obtaining a copy of this software and associated documentation
@@ -21,11 +21,6 @@
  * WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING
  * FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
  * OTHER DEALINGS IN THE SOFTWARE.
- *
- * @file: this file proposes the combinational instantiation of constant
- * and variable exponentiation operations. Both implementations utilize 
- * the multiplication operations; however, the constant exponentiation is
- * designed to use fewer multiply nodes to achieve area and speed efficiency.
  */
 
 #include "Power.hpp"