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Input: ads7846 - pin change interrupt support
Some SoCs support only pin change interrupts on GPIO pins used as irq lines. The ads7846 core is not affected from the additional irqs on the rising edge because the code accounts touch bounce anyway by kicking in a timer and disabling the irq after the first request and reenabling the irq after a timeout when there is no longer pen down detected. Signed-off-by: Michael Roth <[email protected]> Signed-off-by: Andrew Morton <[email protected]> Signed-off-by: Dmitry Torokhov <[email protected]>
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