Use asap7_small lib for speed

wjchen1015 · Aug 13, 2024 · 9300576 · 9300576
1 parent ed1bab9
commit 9300576
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Showing 2 changed files with 8 additions and 61 deletions.
diff --git a/test/get_filter.ok b/test/get_filter.ok
@@ -1,72 +1,21 @@
-Warning: asap7_simple.lib.gz line 71510, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 71986, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 72462, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 72938, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 73414, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 74830, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 71029, timing group from output port.
-Warning: asap7_simple.lib.gz line 71505, timing group from output port.
-Warning: asap7_simple.lib.gz line 71981, timing group from output port.
-Warning: asap7_simple.lib.gz line 72457, timing group from output port.
-Warning: asap7_simple.lib.gz line 72933, timing group from output port.
-Warning: asap7_simple.lib.gz line 73409, timing group from output port.
-Warning: asap7_simple.lib.gz line 73885, timing group from output port.
-Warning: asap7_simple.lib.gz line 82276, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 83692, when attribute inside table model.
-Warning: asap7_simple.lib.gz line 81795, timing group from output port.
-Warning: asap7_simple.lib.gz line 82271, timing group from output port.
-Warning: asap7_simple.lib.gz line 82747, timing group from output port.
 get_cells
 u1
 get_clocks
 clk
 get_clocks 2
 vclk
 get_lib_cells
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx10_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx12_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx12f_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx16f_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx24_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx2_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx3_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx4_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx4f_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx5_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx6f_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/BUFx8_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/HB1xp67_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/HB2xp67_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/HB3xp67_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/HB4xp67_ASAP7_75t_R
+asap7_small/BUFx2_ASAP7_75t_R
 get_lib_cells 2
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx10_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx11_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx12_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx14_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx16_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx20_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx5p33_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx6p67_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx8_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/CKINVDCx9p33_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx11_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx13_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx1_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx2_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx3_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx4_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx5_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx6_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVx8_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVxp33_ASAP7_75t_R
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120/INVxp67_ASAP7_75t_R
+asap7_small/AND2x2_ASAP7_75t_R
+asap7_small/BUFx2_ASAP7_75t_R
+asap7_small/DFFHQx4_ASAP7_75t_R
 get_lib_pins
 A
 get_lib_pins 2
 Y
 get_libs
-asap7sc7p5t_INVBUF_RVT_TT_ccs_211120
+asap7_small
 get_nets
 r1q
 r2q

diff --git a/test/get_filter.tcl b/test/get_filter.tcl
@@ -1,7 +1,5 @@
 # Read in design and libraries
-read_liberty asap7_invbuf.lib.gz
-read_liberty asap7_seq.lib.gz
-read_liberty asap7_simple.lib.gz
+read_liberty asap7_small.lib.gz
 read_verilog reg1_asap7.v
 link_design top
 create_clock -name clk -period 500 {clk1 clk2 clk3}
@@ -17,13 +15,13 @@ report_object_full_names [get_clocks -filter is_virtual==1 *]
 puts "get_lib_cells"
 report_object_full_names [get_lib_cells -filter is_buffer==1 *]
 puts "get_lib_cells 2"
-report_object_full_names [get_lib_cells -filter is_inverter==1 *]
+report_object_full_names [get_lib_cells -filter is_inverter==0 *]
 puts "get_lib_pins"
 report_object_full_names [get_lib_pins -filter direction==input BUFx2_ASAP7_75t_R/*]
 puts "get_lib_pins 2"
 report_object_full_names [get_lib_pins -filter direction==output BUFx2_ASAP7_75t_R/*]
 puts "get_libs"
-report_object_full_names [get_libs -filter name==asap7sc7p5t_INVBUF_RVT_TT_ccs_211120 *]
+report_object_full_names [get_libs -filter name==asap7_small *]
 puts "get_nets"
 report_object_full_names [get_nets -filter name=~*q *]
 puts "get_pins"