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This repo includes 3 independent modules: UART receiver, UART transmitter, UART to AXI4 master. 本项目包含3个独立模块:UART接收器、UART发送器、UART转AXI4交互式调试器。
Performs Circular, Hyperbolic, and Linear for Rotation and Vectors to compute elementary functions
MATALB Implementation of all modes of CORDIC
MATLAB implementation of "Single Image Haze Removal Using Dark Channel Prior"
👀 MinGW 32bit and 64bit version of OpenCV compiled on Windows. Including OpenCV 3.3.1, 3.4.1, 3.4.1-x64, 3.4.5, 3.4.6, 3.4.7, 3.4.8-x64, 3.4.9, 4.0.0-alpha-x64, 4.0.0-rc-x64, 4.0.1-x64, 4.1.0, 4.1.…
The Dark Channel Prior technique is implemented on FPGA using only Verilog code and no Intellectual Property, making it convenient to replicate using any simulator and any of the available FPGA boa…
Single Image Haze Removal Using Dark Channel Prior
2024年全国大学生FPGA创新设计竞赛-紫光同创赛道-赛题三
该作品为2024年FPGA创新设计大赛(上海安路科技赛道)国一作品
Greedy Snake game on Nexys 4 DDR with Verilog.
Conquer Any Code in VSCode: One-Click Comments, Conversions, UI-to-Code, and AI Batch Processing of Files! 在 VSCode 中征服任何代码:一键注释、转换、UI 图生成代码、AI 批量处理文件!💪
A very simple and easy to understand RISC-V core.
PC-side code for PacGoc, enterprise grand prize-winning work at PangoMirco Cup CICC 2024. [第八届集创赛紫光同创杯企业大奖获奖作品]
2024年全国大学生嵌入式芯片与系统设计竞赛 FPGA创新设计赛道 国一+易灵思创新杯获奖作品 Ultra-Vision (基于Ti60F225的无极缩放算法实现)
ChinaRyan666 / FPGA-
Forked from LeiWang1999/FPGA帮助大家进行FPGA的入门,分享FPGA相关的优秀文章,优秀项目