Convert CONFIG_LBA48 et al to Kconfig

This converts the following to Kconfig: CONFIG_LBA48 CONFIG_SYS_64BIT_LBA Signed-off-by: Tom Rini <[email protected]>
zerodi · Jun 28, 2022 · aca1f67 · aca1f67
1 parent 0a816d9
commit aca1f67
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Showing 174 changed files with 195 additions and 231 deletions.
diff --git a/README b/README
@@ -664,18 +664,6 @@ The following options need to be configured:
 		CONFIG_SCSI) you must configure support for at
 		least one non-MTD partition type as well.
 
-- LBA48 Support
-		CONFIG_LBA48
-
-		Set this to enable support for disks larger than 137GB
-		Also look at CONFIG_SYS_64BIT_LBA.
-		Whithout these , LBA48 support uses 32bit variables and will 'only'
-		support disks up to 2.1TB.
-
-		CONFIG_SYS_64BIT_LBA:
-			When enabled, makes the IDE subsystem use 64bit sector addresses.
-			Default is 32bit.
-
 - NETWORK Support (PCI):
 		CONFIG_E1000_SPI
 		Utility code for direct access to the SPI bus on Intel 8257x.

diff --git a/arch/arm/mach-kirkwood/include/mach/config.h b/arch/arm/mach-kirkwood/include/mach/config.h
@@ -49,8 +49,6 @@
 #define __io
 /* Data, registers and alternate blocks are at the same offset */
 /* Each 8-bit ATA register is aligned to a 4-bytes address */
-/* Controller supports 48-bits LBA addressing */
-#define CONFIG_LBA48
 /* CONFIG_IDE requires some #defines for ATA registers */
 /* ATA registers base is at SATA controller base */
 #endif /* CONFIG_IDE */

diff --git a/configs/A10-OLinuXino-Lime_defconfig b/configs/A10-OLinuXino-Lime_defconfig
@@ -15,6 +15,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/A20-OLinuXino-Lime2-eMMC_defconfig b/configs/A20-OLinuXino-Lime2-eMMC_defconfig
@@ -19,6 +19,7 @@ CONFIG_SYS_PBSIZE=1024
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_SYS_I2C_MVTWSI=y

diff --git a/configs/A20-OLinuXino-Lime2_defconfig b/configs/A20-OLinuXino-Lime2_defconfig
@@ -17,6 +17,7 @@ CONFIG_SYS_PBSIZE=1024
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_SYS_I2C_MVTWSI=y

diff --git a/configs/A20-OLinuXino-Lime_defconfig b/configs/A20-OLinuXino-Lime_defconfig
@@ -13,6 +13,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/A20-OLinuXino_MICRO-eMMC_defconfig b/configs/A20-OLinuXino_MICRO-eMMC_defconfig
@@ -15,6 +15,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/A20-OLinuXino_MICRO_defconfig b/configs/A20-OLinuXino_MICRO_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/A20-Olimex-SOM-EVB_defconfig b/configs/A20-Olimex-SOM-EVB_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig b/configs/A20-Olimex-SOM204-EVB-eMMC_defconfig
@@ -17,6 +17,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f

diff --git a/configs/A20-Olimex-SOM204-EVB_defconfig b/configs/A20-Olimex-SOM204-EVB_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f

diff --git a/configs/Bananapi_M2_Ultra_defconfig b/configs/Bananapi_M2_Ultra_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Bananapi_defconfig b/configs/Bananapi_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_NETCONSOLE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Bananapro_defconfig b/configs/Bananapro_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_NETCONSOLE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Cubieboard2_defconfig b/configs/Cubieboard2_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Cubieboard_defconfig b/configs/Cubieboard_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Cubietruck_defconfig b/configs/Cubietruck_defconfig
@@ -19,6 +19,7 @@ CONFIG_SYS_PBSIZE=1024
 CONFIG_CMD_DFU=y
 CONFIG_CMD_USB_MASS_STORAGE=y
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_DFU_RAM=y
 CONFIG_FASTBOOT_CMD_OEM_FORMAT=y
 CONFIG_SYS_I2C_MVTWSI=y

diff --git a/configs/Itead_Ibox_A20_defconfig b/configs/Itead_Ibox_A20_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Lamobo_R1_defconfig b/configs/Lamobo_R1_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Linksprite_pcDuino3_Nano_defconfig b/configs/Linksprite_pcDuino3_Nano_defconfig
@@ -14,6 +14,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Linksprite_pcDuino3_defconfig b/configs/Linksprite_pcDuino3_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Marsboard_A10_defconfig b/configs/Marsboard_A10_defconfig
@@ -8,6 +8,7 @@ CONFIG_AHCI=y
 CONFIG_SPL_STACK=0x8000
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Mele_A1000_defconfig b/configs/Mele_A1000_defconfig
@@ -12,6 +12,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Mele_M5_defconfig b/configs/Mele_M5_defconfig
@@ -13,6 +13,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Orangepi_defconfig b/configs/Orangepi_defconfig
@@ -16,6 +16,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/Orangepi_mini_defconfig b/configs/Orangepi_mini_defconfig
@@ -18,6 +18,7 @@ CONFIG_SPL_STACK=0x8000
 CONFIG_SPL_I2C=y
 CONFIG_SYS_PBSIZE=1024
 CONFIG_SCSI_AHCI=y
+CONFIG_SYS_64BIT_LBA=y
 CONFIG_SYS_I2C_MVTWSI=y
 CONFIG_SYS_I2C_SLAVE=0x7f
 CONFIG_SYS_I2C_SPEED=400000

diff --git a/configs/P1020RDB-PC_36BIT_NAND_defconfig b/configs/P1020RDB-PC_36BIT_NAND_defconfig
@@ -72,6 +72,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_36BIT_SDCARD_defconfig b/configs/P1020RDB-PC_36BIT_SDCARD_defconfig
@@ -63,6 +63,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P1020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_36BIT_defconfig b/configs/P1020RDB-PC_36BIT_defconfig
@@ -43,6 +43,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_NAND_defconfig b/configs/P1020RDB-PC_NAND_defconfig
@@ -71,6 +71,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_SDCARD_defconfig b/configs/P1020RDB-PC_SDCARD_defconfig
@@ -62,6 +62,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_SPIFLASH_defconfig b/configs/P1020RDB-PC_SPIFLASH_defconfig
@@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PC_defconfig b/configs/P1020RDB-PC_defconfig
@@ -42,6 +42,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PD_NAND_defconfig b/configs/P1020RDB-PD_NAND_defconfig
@@ -74,6 +74,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PD_SDCARD_defconfig b/configs/P1020RDB-PD_SDCARD_defconfig
@@ -65,6 +65,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PD_SPIFLASH_defconfig b/configs/P1020RDB-PD_SPIFLASH_defconfig
@@ -68,6 +68,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P1020RDB-PD_defconfig b/configs/P1020RDB-PD_defconfig
@@ -45,6 +45,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=2
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_36BIT_NAND_defconfig b/configs/P2020RDB-PC_36BIT_NAND_defconfig
@@ -76,6 +76,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_36BIT_SDCARD_defconfig b/configs/P2020RDB-PC_36BIT_SDCARD_defconfig
@@ -67,6 +67,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig b/configs/P2020RDB-PC_36BIT_SPIFLASH_defconfig
@@ -70,6 +70,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_36BIT_defconfig b/configs/P2020RDB-PC_36BIT_defconfig
@@ -47,6 +47,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_NAND_defconfig b/configs/P2020RDB-PC_NAND_defconfig
@@ -75,6 +75,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_SDCARD_defconfig b/configs/P2020RDB-PC_SDCARD_defconfig
@@ -66,6 +66,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_SPIFLASH_defconfig b/configs/P2020RDB-PC_SPIFLASH_defconfig
@@ -69,6 +69,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P2020RDB-PC_defconfig b/configs/P2020RDB-PC_defconfig
@@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="eTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_DDR_CLK_FREQ=66666666
 CONFIG_CHIP_SELECTS_PER_CTRL=1
 CONFIG_SYS_BR0_PRELIM_BOOL=y

diff --git a/configs/P4080DS_SDCARD_defconfig b/configs/P4080DS_SDCARD_defconfig
@@ -44,6 +44,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y

diff --git a/configs/P4080DS_SPIFLASH_defconfig b/configs/P4080DS_SPIFLASH_defconfig
@@ -46,6 +46,7 @@ CONFIG_BOOTFILE="uImage"
 CONFIG_USE_ETHPRIME=y
 CONFIG_ETHPRIME="FM1@DTSEC1"
 CONFIG_DM=y
+CONFIG_LBA48=y
 CONFIG_FSL_CAAM=y
 CONFIG_DDR_ECC=y
 CONFIG_ECC_INIT_VIA_DDRCONTROLLER=y