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Design a MIPS CPU in Verilog; Run AES encoder in this RISC-core;

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-# MIPS_AES
-Design a MIPS CPU in Verilog; Run AES encoder in this RISC-core;
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-My fisrt time to use git, so it is just a test;

To run the sim, do as following:

1) open a terminal in PWD "MIPS_AES/sim"
2) type command "./aes_sim.run" to run the shell script.

THANK YOU! :)

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Design a MIPS CPU in Verilog; Run AES encoder in this RISC-core;

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