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PWM running
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Laurenceb committed Aug 30, 2012
1 parent 97d1b6b commit a97bbb7
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Showing 22 changed files with 714 additions and 690 deletions.
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1,369 changes: 684 additions & 685 deletions main.map

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26 changes: 26 additions & 0 deletions tests/timsim/timsim.m
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@@ -0,0 +1,26 @@
function [sig]=timsim(counter3,counter2,counter4)
sig=[];
for(a=1:1161216)
counter3+=1;
if(counter3<5983)
counter2+=1;
if(counter2<5921)
counter4+=1;
if(counter4==5983)
counter4=0;
endif
else
if(counter2==5952)
counter2=0;
endif
endif
else
if(counter3==6048)
counter3=0;
endif
endif
sig(a,:)=[counter3,counter2,counter4];
printf("%f \r",a/1161216);
fflush(stdout);
endfor
endfunction
7 changes: 3 additions & 4 deletions timer.c
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Expand Up @@ -132,9 +132,8 @@ void setup_pwm(void) {
TIM_SelectOutputTrigger(TIM2,TIM_TRGOSource_OC1Ref);
TIM_OC1Init(TIM2, &TIM_OCInitStructure); //Tim2,ch1 used for gating
TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Enable);
//TIM_SelectMasterSlaveMode(TIM4,TIM_MasterSlaveMode_Enable);
#if PPG_CHANNELS>1
//TIM_ETRConfig(TIM4,TIM_ExtTRGPSC_OFF,TIM_ExtTRGPolarity_NonInverted,0x00);//Setup timer4 to trigger off timer2 with no filtering
TIM_SelectMasterSlaveMode(TIM4,TIM_MasterSlaveMode_Enable);
TIM_SelectInputTrigger(TIM4,TIM_TS_ITR1); //Tim4 off tim2
TIM_SelectSlaveMode(TIM4,TIM_SlaveMode_Gated); //Tim4 is gated by the tim2 channel1 input
#endif
Expand All @@ -148,8 +147,8 @@ void setup_pwm(void) {
TIM_Cmd(TIM2, ENABLE);
#else
#if PPG_CHANNELS>2
//TIM4->CNT=PWM_PERIOD_CENTER/2;//This causes the third timer to be in antiphase, giving reduce peak ADC signal
//TIM_Cmd(TIM4, ENABLE);
TIM4->CNT=PWM_PERIOD_CENTER/2;//This causes the third timer to be in antiphase, giving reduce peak ADC signal
TIM_Cmd(TIM4, ENABLE);
#endif
#if PPG_CHANNELS>1
TIM_Cmd(TIM2, ENABLE);
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2 changes: 1 addition & 1 deletion timer.h
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Expand Up @@ -4,7 +4,7 @@
#define MAX_DUTY 2047*3/4 /*max duty cycle for the motor - dont want to risk going to 100% as it will overrev motor*/
#define PWM_RES MAX_DUTY /*motor pwm resolution*/

#define PWM_PERIOD_TWO 5982ul
#define PWM_PERIOD_TWO 6047ul//5982ul
#define PWM_PERIOD_ONE 6047ul
#define PWM_PERIOD_ZERO 5951ul

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