Timer fixes

tests/timsim/timsim.m~

@@ -1,11 +1,20 @@
-function timers=timsim()
+function timers=timsim(updown,n)
 	numclks=6048*192*3;
 	timers=zeros(numclks,3);
 	timers(:,1)=repmat([1:6048]',192*3,1);
 	pwmout_one=zeros(numclks,1);
-	pwmout_one(find(timers(:,1)<5921))=1;
-	timers(:,2)=mod(cumsum(pwmout_one),5952);
-	pwmout_two=zeros(numclks,1);
-	pwmout_two(find(timers(:,1)<5922))=1;
-	timers(:,3)=mod(cumsum(pwmout_two),5830);
+	#if updown is true we go up then down, otherwise we go down then up
+	if updown
+		pwmout_one(find(timers(:,1)<=5983))=1;
+		timers(:,2)=mod(cumsum(pwmout_one),5952);
+		pwmout_two=zeros(numclks,1);
+		pwmout_two(find(timers(:,2)<=5920))=1;
+		timers(:,3)=mod(cumsum(pwmout_two),6048);		
+	else
+		pwmout_one(find(timers(:,1)<=5921))=1;
+		timers(:,2)=mod(cumsum(pwmout_one),5952);
+		pwmout_two=zeros(numclks,1);
+		pwmout_two(find(timers(:,2)<=5888))=1;
+		timers(:,3)=mod(cumsum(pwmout_two),5953);
+	endif
 endfunction

timer.c

@@ -2,6 +2,8 @@
 #include "gpio.h"
 #include "Sensors/ppg.h"
 
+#define CR1_CEN_Set                 ((uint16_t)0x0001)
+
 /**
   * @brief  Configure the timer channels for PWM out on CRT board
   * @param  None
@@ -133,7 +135,7 @@ void setup_pwm(void) {
   TIM_OC1Init(TIM2, &TIM_OCInitStructure);		//Tim2,ch1 used for gating
   TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Enable);
   #if PPG_CHANNELS>1
-  //TIM_SelectMasterSlaveMode(TIM4,TIM_MasterSlaveMode_Enable);
+  TIM_SelectMasterSlaveMode(TIM4,TIM_MasterSlaveMode_Enable);
   TIM_SelectInputTrigger(TIM4,TIM_TS_ITR1);		//Tim4 off tim2
   TIM_SelectSlaveMode(TIM4,TIM_SlaveMode_Gated);	//Tim4 is gated by the tim2 channel1 input
   #endif
@@ -146,14 +148,16 @@ void setup_pwm(void) {
     #endif
     TIM_Cmd(TIM2, ENABLE);
   #else
+      TIM2->CNT=0;
+      TIM3->CNT=0;
     #if PPG_CHANNELS>2
       TIM4->CNT=PWM_PERIOD_CENTER/2;//This causes the third timer to be in antiphase, giving reduce peak ADC signal
-      TIM_Cmd(TIM4, ENABLE);
+      TIM4->CR1 |= CR1_CEN_Set;
     #endif
     #if PPG_CHANNELS>1
-      TIM_Cmd(TIM2, ENABLE);
+      TIM2->CR1 |= CR1_CEN_Set;
     #endif
-    TIM_Cmd(TIM3, ENABLE);
+    TIM3->CR1 |= CR1_CEN_Set;
   #endif
   __enable_irq();
 

timer.c~

@@ -61,11 +61,11 @@ void setup_pwm(void) {
   TIM_OCInitStructure.TIM_Pulse = 4;
   TIM_TimeBaseStructure.TIM_CounterMode = TIM_CounterMode_Up;
 
-  /*Time base configuration  - timer 4 as PWM2/0*/
+  /*Time base configuration  - timer 4 as PWM0/2*/
   #if BOARD<3
-  TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_TWO;	//PWM2 on early boards
+  TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_ZERO;	//PWM0 on early boards
   #else
-  TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_ZERO;	//PWM0 on later boards
+  TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_TWO;	//PWM2 on later boards
   #endif
   /*setup 4*/
   TIM_TimeBaseInit(TIM4, &TIM_TimeBaseStructure);
@@ -84,11 +84,11 @@ void setup_pwm(void) {
   TIM_ARRPreloadConfig(TIM4, ENABLE);
 
 
-  /*Now setup timer 2 as PWM1/2*/
+  /*Now setup timer 2 as PWM1/0*/
   #if BOARD<3
   TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_ONE;
   #else
-  TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_TWO;
+  TIM_TimeBaseStructure.TIM_Period = PWM_PERIOD_ZERO;
   #endif
   TIM_TimeBaseInit(TIM2, &TIM_TimeBaseStructure);	//Same as timer4
   /* PWM1 Mode configuration: Channel3 */
@@ -133,7 +133,7 @@ void setup_pwm(void) {
   TIM_OC1Init(TIM2, &TIM_OCInitStructure);		//Tim2,ch1 used for gating
   TIM_OC1PreloadConfig(TIM2, TIM_OCPreload_Enable);
   #if PPG_CHANNELS>1
-  //TIM_SelectMasterSlaveMode(TIM4,TIM_MasterSlaveMode_Enable);
+  TIM_SelectMasterSlaveMode(TIM4,TIM_MasterSlaveMode_Enable);
   TIM_SelectInputTrigger(TIM4,TIM_TS_ITR1);		//Tim4 off tim2
   TIM_SelectSlaveMode(TIM4,TIM_SlaveMode_Gated);	//Tim4 is gated by the tim2 channel1 input
   #endif
@@ -146,14 +146,16 @@ void setup_pwm(void) {
     #endif
     TIM_Cmd(TIM2, ENABLE);
   #else
+      TIM2->CNT=0;
+      TIM3->CNT=0;
     #if PPG_CHANNELS>2
       TIM4->CNT=PWM_PERIOD_CENTER/2;//This causes the third timer to be in antiphase, giving reduce peak ADC signal
-      TIM_Cmd(TIM4, ENABLE);
+      TIM4->CR1 |= CR1_CEN_Set;
     #endif
     #if PPG_CHANNELS>1
-      TIM_Cmd(TIM2, ENABLE);
+      TIM2->CR1 |= CR1_CEN_Set;
     #endif
-    TIM_Cmd(TIM3, ENABLE);
+    TIM3->CR1 |= CR1_CEN_Set;
   #endif
   __enable_irq();
 

timer.h

@@ -9,7 +9,7 @@
 #define PWM_PERIOD_TWO 6047ul
 
 #define GATING_PERIOD_ZERO 5983ul
-#define GATING_PERIOD_ONE  5920ul
+#define GATING_PERIOD_ONE  5921ul
 
 #define PWM_PERIOD_CENTER PWM_PERIOD_ONE
 //Macros to link to the periph functions

timer.h~

@@ -4,9 +4,9 @@
 #define MAX_DUTY 2047*3/4	/*max duty cycle for the motor - dont want to risk going to 100% as it will overrev motor*/
 #define PWM_RES MAX_DUTY	/*motor pwm resolution*/
 
-#define PWM_PERIOD_TWO 5951ul
+#define PWM_PERIOD_ZERO 5951ul
 #define PWM_PERIOD_ONE 6047ul
-#define PWM_PERIOD_ZERO 6047ul
+#define PWM_PERIOD_TWO 6047ul
 
 #define GATING_PERIOD_ZERO 5983ul
 #define GATING_PERIOD_ONE  5920ul
@@ -22,13 +22,13 @@
 	#define Get_PWM_1()  TIM2->CCR3
 	#define Get_PWM_2()  TIM4->CCR4
 #else			/* Note that on version 3+ of the PCB, PFET output drivers mean output is inverted - we use PWM mode2*/
-	#define Set_PWM_0(compare) TIM_SetCompare4(TIM4, compare)
+	#define Set_PWM_2(compare) TIM_SetCompare4(TIM4, compare)
 	#define Set_PWM_1(compare) TIM_SetCompare1(TIM3, compare)
-	#define Set_PWM_2(compare) TIM_SetCompare3(TIM2, compare)
+	#define Set_PWM_0(compare) TIM_SetCompare3(TIM2, compare)
 	#define Set_PWM_Motor(compare) TIM_SetCompare1(TIM1, compare)
-	#define Get_PWM_0()  TIM4->CCR4
+	#define Get_PWM_2()  TIM4->CCR4
 	#define Get_PWM_1()  TIM3->CCR1
-	#define Get_PWM_2()  TIM2->CCR3
+	#define Get_PWM_0()  TIM2->CCR3
 #endif
 //Configure the pwm
 void setup_pwm(void);