Skip to content
View BambangTW's full-sized avatar

Highlights

  • Pro

Block or report BambangTW

Block user

Prevent this user from interacting with your repositories and sending you notifications. Learn more about blocking users.

You must be logged in to block users.

Please don't include any personal information such as legal names or email addresses. Maximum 100 characters, markdown supported. This note will be visible to only you.
Report abuse

Contact GitHub support about this user’s behavior. Learn more about reporting abuse.

Report abuse
Showing results

Fully open reproduction of DeepSeek-R1

Python 23,278 2,118 Updated Mar 24, 2025
SystemVerilog 19 8 Updated Oct 4, 2023
SystemVerilog 10 6 Updated Aug 3, 2021
Verilog 2 2 Updated Jun 19, 2018

A huge collection of VHDL/Verilog open-source IP cores scraped from the web

440 132 Updated Jan 18, 2023

Package manager and build abstraction tool for FPGA/ASIC development

Python 1,255 257 Updated Mar 18, 2025