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@EDANexus

EDANexus

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  1. OpenDB OpenDB Public

    Forked from The-OpenROAD-Project/OpenDB

    Database and Tool Framework for EDA

    C++ 1

  2. galois galois Public

    Forked from tomverbeure/galois

    Python

  3. yosys_gatemap yosys_gatemap Public

    Forked from tomverbeure/yosys_gatemap

    An example that shows how to map a design to a custom cell library.

    Verilog

  4. yosys_split_ops yosys_split_ops Public

    Forked from tomverbeure/yosys_split_ops

    Yosys techmaps to split operations on large vectors into multiple smaller ones.

    Verilog

  5. yosys_techmap_blog yosys_techmap_blog Public

    Forked from tomverbeure/yosys_techmap_blog

    Example repo for blog post

    Verilog

  6. yosys yosys Public

    Forked from YosysHQ/yosys

    Yosys Open SYnthesis Suite

    C++

Repositories

Showing 10 of 87 repositories
  • xls Public Forked from google/xls

    XLS: Accelerated HW Synthesis

    EDANexus/xls’s past year of commit activity
    C++ 0 Apache-2.0 198 0 0 Updated Dec 19, 2024
  • magic Public Forked from RTimothyEdwards/magic

    Magic VLSI Layout Tool

    EDANexus/magic’s past year of commit activity
    C 0 111 0 0 Updated Dec 17, 2024
  • actflow Public Forked from asyncvlsi/actflow

    Top-level repository for the ACT EDA flow

    EDANexus/actflow’s past year of commit activity
    Shell 0 GPL-2.0 6 0 0 Updated Dec 17, 2024
  • act Public Forked from asyncvlsi/act

    ACT hardware description language and core tools.

    EDANexus/act’s past year of commit activity
    C++ 0 GPL-2.0 26 0 0 Updated Dec 17, 2024
  • klayout Public Forked from KLayout/klayout

    KLayout Main Sources

    EDANexus/klayout’s past year of commit activity
    C++ 0 GPL-3.0 213 0 0 Updated Dec 16, 2024
  • pyuvm Public Forked from pyuvm/pyuvm

    The UVM written in Python

    EDANexus/pyuvm’s past year of commit activity
    Python 0 73 0 0 Updated Dec 16, 2024
  • zerosoc Public Forked from siliconcompiler/zerosoc

    Demo SoC for SiliconCompiler.

    EDANexus/zerosoc’s past year of commit activity
    SystemVerilog 0 8 0 0 Updated Dec 15, 2024
  • siliconcompiler Public Forked from siliconcompiler/siliconcompiler

    Modular hardware build system

    EDANexus/siliconcompiler’s past year of commit activity
    Python 0 Apache-2.0 87 0 0 Updated Dec 15, 2024
  • PyRTL Public Forked from UCSBarchlab/PyRTL

    A collection of classes providing simple hardware specification, simulation, tracing, and testing suitable for teaching and research. Simplicity, usability, clarity, and extensibility are the overarching goals, rather than performance or optimization.

    EDANexus/PyRTL’s past year of commit activity
    Python 0 BSD-3-Clause 79 0 0 Updated Dec 12, 2024
  • IIC-OSIC-TOOLS Public Forked from iic-jku/IIC-OSIC-TOOLS

    IIC-OSIC-TOOLS is an all-in-one Docker image for SKY130/GF180/IHP130-based analog and digital chip design. AMD64 and ARM64 are natively supported.

    EDANexus/IIC-OSIC-TOOLS’s past year of commit activity
    Python 0 Apache-2.0 82 0 0 Updated Dec 12, 2024

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