Verilator open-source SystemVerilog simulator and lint system

Benchmarking Deep Learning operations on different hardware

Verilog to Routing -- Open Source CAD Flow for FPGA Research

A small C11 compiler

An FPGA accelerator for general-purpose Sparse-Matrix Dense-Matrix Multiplication (SpMM).

A Reconfigurable Accelerator with Data Reordering Support for Low-Cost On-Chip Dataflow Switching

The RAD flow is an open-source academic architecture exploration and evaluation flow for novel beyond-FPGA reconfigurable acceleration devices (RADs). These devices incorporate conventional FPGA fa…

SA4: A Comprehensive Analysis and Optimization of Systolic Array Architecture for 4-bit Convolutions

This project accelerates CNN computation with the help of FPGA, for more than 50x speed-up compared with CPU.