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Commits on Dec 14, 2023

• README.md: corrections of caller/callee in the syscall/ABI and some minor ones

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Commits on Dec 11, 2023

• Release: update version to 0.9.6

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• GUI: modified examples from the resources require Save as dialog when session is remembered

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• Machine: minor diagnostic and error messages cleanup

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• CLI: report level 2 cache statistic if L2 cache is enabled

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• CLI: add cycle-limit option to limit execution to given number of cycles.

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Commits on Dec 10, 2023

• Machine: pseudo instructions which are aliases of real one are implemented by aliases tables

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• GUI: try to open editor if open tab is not found for file from error message

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• GUI: hide speed improvement in L2 cache when behind L1D or L1I

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Commits on Dec 9, 2023

• CLI: add isa-variant option to the command line simulator version.

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• GUI: update registers and CSR views for bare RV64IMA support

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• GUI: the XLEN, atomic and multiply options controls added into new simulation dialog

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• Machine: propagate ISA flags into misa CSR register

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• Machine: check if instruction is supported for given XLEN and extension set

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• GUI: add reset widows menu entry to restore default windows layout

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Commits on Dec 7, 2023

• README.md: document support of atomic memory operations (AMO)

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• Machine: implemented RISC-V A extension for RV32IMA/RV64IMA support

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• Machine: prepare field for instruction aliases in InstructionMap descriptors.

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Commits on Dec 6, 2023

• Machine and GUI: add explicit checkbox to enable burst access

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Commits on Dec 4, 2023

• Machine and GUI: simple level 2 cache implementation.

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• GUI: set parents to helper objects to prevent memory leakage found by Valgrind

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Commits on Dec 3, 2023

• Machine: basic implementation of RISC-V ACLINT MSWI interrupt

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Commits on Dec 2, 2023

• Machine: restrict more CSR registers fields to read only and correct CYCLE CSR updates

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• Machine: extend CSR support to pass rv32mi-p-mcsr and rv64mi-p-mcsr official test

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• Machine: do not abort application if CSR symbolic name is not know in disassembler

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• Machine: map ecall to ECALL_M for documented mcause code (M-mode only supported now)

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Commits on Nov 30, 2023

• os_emulation: correct ftruncate syscall arguments for 64 and 32-bit ABI

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• README.md and example: minor updates for clarification

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• GUI: ensure that all lines of external make process are processed

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Commits on Nov 29, 2023

• GUI: RISC-V ACLINT MSWI mapping added into resources/samples/template.S

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• Machine: basic implementation of RISC-V ACLINT MSWI interrupt

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Commits on Nov 28, 2023

• Merge pull request cvut#90 from cvut/aclint_mtimer

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• GUI: RISC-V ACLINT MTIMER mapping added into resources/samples/template.S

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• Machine: basic implementation of RISC-V ACLINT MTIMER

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• Machine: add memory access helper for access with granularity 64-bits

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