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Commits on Nov 14, 2023

• arch: riscv: fix hangup in boot if hart0 is not boot hart

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Commits on Nov 10, 2023

• arch: riscv: fix hangup of multicore boot

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Commits on May 16, 2022

• boards: hifive1_revb: add pinctrl configs for spi

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Commits on Feb 22, 2022

• boards: riscv: hifive_unleashed: add GPIO support

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Commits on Sep 18, 2021

• dts: riscv: fix irq number of UART and SPI for SiFive FU740

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Commits on Sep 3, 2021

• samples: jesd216: Exclude hifive_unleashed and unmatched boards

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• boards: add support for HiFive Unmatched

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• soc: riscv: add initial support for SiFive Freedom U740

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• boards: add support for HiFive Unleashed

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• soc: riscv: add initial support for SiFive Freedom U540

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• drivers: serial: sifive: support SiFive Freedom series SoCs

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• samples: drivers: spi_flash: fix printf warning on 64bit environment

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Commits on Jun 10, 2021

• actions: replace duplicated label for RISCV

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Commits on May 6, 2021

• drivers: spi: sifive: fix bug of transferring multiple bufs

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  galak

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Commits on Mar 25, 2021

• kernel: arch: use ENOTSUP instead of ENOSYS in k_float_disable()

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• kernel: arch: introduce k_float_enable()

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Commits on Mar 4, 2021

• arch: riscv: add common stub reboot function

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  MaureenHelm

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Commits on Mar 2, 2021

• drivers: timer: reduce max cycles of riscv machine timer

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Commits on Feb 4, 2021

• soc/riscv: support reboot for QEMU RISC-V VirtIO

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Commits on Jan 16, 2021

• drivers: gpio: sifive: use interrupt-cell to set IRQ priority

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• drivers: serial: sifive: use interrupt-cell to set IRQ priority

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Commits on Jan 15, 2021

• boards/dts: riscv: add SiFive FE310 watchdog driver bindings

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• drivers: watchdog: implement SiFive FE310 watchdog driver

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Commits on Jan 14, 2021

• dts: bindings: add IRQ priority support for SiFive PLIC

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• kernel: describe detailed means of K_FP_REGS flag

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Commits on Dec 5, 2020

• kernel: init: activate FPU for main thread

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Commits on Dec 2, 2020

• MAINTAINERS: Add myself to watchdog collaborators.

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  katsuster

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  MaureenHelm

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Commits on Nov 19, 2020

• dts/bindings: Add binding for riscv,clint0

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• logging: add padding for RISC-V 64bits environment

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• dts: riscv32-fe310: add missing clint properties

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Commits on Nov 18, 2020

• MAINTAINERS: add RISCV related directories

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  katsuster

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Commits on Nov 16, 2020

• MAINTAINERS: Add myself to RISCV subsys collaborators.

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  katsuster

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  MaureenHelm

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