- 👋 Hi, I’m @lucasLi920.
- 👀 I’m interested in digital design, SoC design and RISC-V...
- 🌱 I’m currently learning RISC-V ISA and some open source EDA tools...
- 💞️ I’m looking to collaborate on ...
- 📫 How to reach me ...
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cortexm0ds
cortexm0ds PublicForked from ForrestBlue/cortexm0ds
simple AMBA systems reference
Verilog
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pulp
pulp PublicForked from pulp-platform/pulp
This is the top-level project for the PULP Platform. It instantiates a PULP open-source system with a PULP SoC (microcontroller) domain accelerated by a PULP cluster with 8 cores.
SystemVerilog
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pulpissimo
pulpissimo PublicForked from pulp-platform/pulpissimo
This is the top-level project for the PULPissimo Platform. It instantiates a PULPissimo open-source system with a PULP SoC domain, but no cluster.
SystemVerilog
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