Vendor in hw/dv/{data,tools} from OpenTitan

This gets the rest of the support code needed for dvsim (which we
currently duplicate). The patch:

  - adds the relevant directories to the vendoring file
  - adds a patch to rewrite some OpenTitan-specific bits
  - adds a "common_project_cfg.hjson"
  - re-runs the vendoring tool

This patch won't yet change how DV code runs; we also need to redirect
a couple of paths and delete dv/uvm/data for that. This will happen in
the next patch.

Signed-off-by: Rupert Swarbrick <[email protected]>

dv/uvm/common_project_cfg.hjson

@@ -0,0 +1,18 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  project:          ibex
+
+  // These keys are expected by dvsim.py, so we have to set them to something.
+  doc_server:       bogus.doc.server
+  results_server:   bogus.results.server
+
+  // Default directory structure for the output
+  scratch_base_path:  "{scratch_root}/{dut}.{flow}.{tool}"
+  scratch_path:       "{scratch_base_path}/{branch}"
+  tool_srcs_dir:      "{scratch_path}/{tool}"
+
+  // The current design level
+  design_level:  "ip"
+}

vendor/lowrisc_ip.vendor.hjson

@@ -11,10 +11,19 @@
     }
 
     mapping: [
+        // We have to apply a patch to the vendored files from hw/dv/data,
+        // because they contain an OpenTitan specific path.
+        {
+            from:      "hw/dv/data",
+            to:        "dv/data",
+            patch_dir: "dv_data"
+        },
+
         {from: "hw/dv/sv/common_ifs",  to: "dv/sv/common_ifs"},
         {from: "hw/dv/sv/csr_utils",   to: "dv/sv/csr_utils"},
         {from: "hw/dv/sv/dv_base_reg", to: "dv/sv/dv_base_reg"},
         {from: "hw/dv/sv/mem_model",   to: "dv/sv/mem_model"},
+        {from: "hw/dv/tools",          to: "dv/tools"},
         {from: "hw/dv/verilator",      to: "dv/verilator"},
 
         // We apply a patch to fix the bus_params_pkg core file name when

vendor/lowrisc_ip/dv/data/common_modes.hjson

@@ -0,0 +1,43 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  // Sim modes are collection of build_opts and run_opts
+  // These are only set on the command line
+  // These are different from the build modes in the sense that these collection of
+  // options are appended to actual build_modes
+  build_modes: [
+    {
+      name: waves
+      is_sim_mode: 1
+      en_build_modes: ["{tool}_waves"]
+    }
+    {
+      name: cov
+      is_sim_mode: 1
+      en_build_modes: ["{tool}_cov"]
+    }
+    {
+      name: profile
+      is_sim_mode: 1
+      en_build_modes: ["{tool}_profile"]
+    }
+    {
+      name: xprop
+      is_sim_mode: 1
+      en_build_modes: ["{tool}_xprop"]
+    }
+    {
+      name: loopdetect
+      is_sim_mode: 1
+      en_build_modes: ["{tool}_loopdetect"]
+    }
+  ]
+
+  run_modes: [
+    {
+      name: uvm_trace
+      run_opts: ["+UVM_PHASE_TRACE", "+UVM_CONFIG_DB_TRACE", "+UVM_OBJECTION_TRACE"]
+    }
+  ]
+}

vendor/lowrisc_ip/dv/data/common_sim_cfg.hjson

@@ -0,0 +1,153 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  // Where to find DV code
+  dv_root:          "{proj_root}/vendor/lowrisc_ip/dv"
+
+  flow:             sim
+  flow_makefile:    "{dv_root}/data/sim.mk"
+
+  import_cfgs:      ["{proj_root}/dv/uvm/common_project_cfg.hjson",
+                     "{dv_root}/data/common_modes.hjson",
+                     "{dv_root}/data/fusesoc.hjson",
+                     "{dv_root}/data/{tool}/{tool}.hjson"]
+
+  // Default directory structure for the output
+  build_dir:          "{scratch_path}/{build_mode}"
+  run_dir_name:       "{index}.{test}"
+  run_dir:            "{scratch_path}/{run_dir_name}/out"
+  sw_build_dir:       "{scratch_path}/sw"
+  sw_root_dir:        "{proj_root}/sw"
+
+  // pass and fail patterns
+  build_pass_patterns: []
+  build_fail_patterns: ["^ERROR:.*$"] // fusesoc build error
+  run_pass_patterns:   ["^TEST PASSED (UVM_)?CHECKS$"]
+  run_fail_patterns:   ["^UVM_ERROR\\s[^:].*$",
+                        "^UVM_FATAL\\s[^:].*$",
+                        "^UVM_WARNING\\s[^:].*$",
+                        "^Assert failed: ",
+                        "^\\s*Offending '.*'",
+                        "^TEST FAILED (UVM_)?CHECKS$"]
+
+  // Default TileLink widths
+  tl_aw: 32
+  tl_dw: 32
+  tl_dbw: 4
+
+  // Default UVM verbosity settings
+  n: UVM_NONE
+  l: UVM_LOW
+  m: UVM_MEDIUM
+  h: UVM_HIGH
+  d: UVM_DEBUG
+
+  // Path to the dut instance (this is used in a couple of places such as coverage cfg
+  // file, xprop cfg file etc. If this is different for your block, then override it with
+  // the 'overrides' directive.
+  dut_instance: "{tb}.dut"
+
+  // Top level simulation entities.
+  sim_tops: ["-top {tb}"]
+
+  // Default build and run opts
+  build_opts: [// List multiple tops for the simulation
+               "{sim_tops}",
+               // Standard UVM defines
+               "+define+UVM",
+               "+define+UVM_NO_DEPRECATED",
+               "+define+UVM_REGEX_NO_DPI",
+               "+define+UVM_REG_ADDR_WIDTH={tl_aw}",
+               "+define+UVM_REG_DATA_WIDTH={tl_dw}",
+               "+define+UVM_REG_BYTENABLE_WIDTH={tl_dbw}"]
+
+  run_opts: ["+UVM_NO_RELNOTES",
+             "+UVM_VERBOSITY={verbosity}"]
+
+  // Default list of things to export to shell
+  exports: [
+    TOOL_SRCS_DIR: {tool_srcs_dir}
+    EN_WAVES: {waves}
+    DUMP_FMT: {dump_fmt}
+    DUT_TOP: {dut}
+    TB_TOP: {tb}
+    dut_instance: {dut_instance}
+  ]
+
+  // Build modes are collection of build_opts and run_opts
+  // A test can enable a specific build mode by setting 'use_build_mode' key
+  build_modes: [
+    {
+      name: foo
+      build_opts: ["+define+bx",
+                   "+define+by",
+                   "+define+bz"]
+      run_opts: ["+rx=1",
+                 "+ry=2",
+                 "+rz=3"]
+    }
+    {
+      name: bar
+      build_opts: ["+define+bbaru1",
+                   "+define+bbaru2",
+                   "+define+bbaru3"]
+      run_opts: ["+rbar1u=1",
+                 "+rbar2u=2",
+                 "+rbar3u=3"]
+    }
+    {
+      name: cover_reg_top
+    }
+  ]
+
+  // Regressions are tests that can be grouped together and run in one shot
+  // By default, two regressions are made available - "all" and "nightly". Both
+  // run all available tests for the DUT. "nightly" enables coverage as well.
+  // The 'tests' key is set to an empty list, which indicates "run everything".
+  // Test sets can enable sim modes, which are a set of build_opts and run_opts
+  // that are grouped together. These are appended to the build modes used by the
+  // tests.
+  regressions: [
+    {
+      name: sanity
+      tests: []
+      reseed: 1
+    }
+
+    {
+      name: all
+    }
+
+    {
+      name: all_once
+      reseed: 1
+    }
+
+    {
+      name: nightly
+      en_sim_modes: ["cov"]
+    }
+  ]
+
+  // Add waves.tcl to the set of sources to be copied over to
+  // {tool_srcs_dir}. This can be sourced by the tool-specific TCL
+  // script to set up wave dumping.
+  tool_srcs:  ["{dv_root}/tools/waves.tcl"],
+
+  // Project defaults for VCS
+  vcs_cov_cfg_file: "{{build_mode}_vcs_cov_cfg_file}"
+  vcs_cov_excl_files: ["{tool_srcs_dir}/common_cov_excl.el"]
+
+  // Build-specific coverage cfg files for VCS.
+  default_vcs_cov_cfg_file: "-cm_hier {tool_srcs_dir}/cover.cfg"
+  cover_reg_top_vcs_cov_cfg_file: "-cm_hier {tool_srcs_dir}/cover_reg_top.cfg"
+
+  // Project defaults for Xcelium
+  // xcelium_cov_cfg_file: "{{build_mode}_xcelium_cov_cfg_file}"
+  // xcelium_cov_refine_files: ["{tool_srcs_dir}/common_cov.vRefine"]
+
+  // Build-specific coverage cfg files for Xcelium.
+  // default_xcelium_cov_cfg_file: "-covfile {tool_srcs_dir}/cover.ccf"
+  // cover_reg_top_xcelium_cov_cfg_file: "-covfile {tool_srcs_dir}/cover_reg_top.ccf"
+}

vendor/lowrisc_ip/dv/data/dsim/dsim.hjson

@@ -0,0 +1,139 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  build_cmd:  "{job_prefix} dsim"
+  run_cmd:    "{job_prefix} dsim"
+
+  build_opts: [
+               "-work {build_dir}/dsim_out",
+               "-genimage image",
+               "-sv",
+               // Set parallel compilation jobs limit
+               "-j 12",
+               // UVM
+               "+incdir+{UVM_HOME}/src",
+               "{UVM_HOME}/src/uvm_pkg.sv",
+               // Add dpi/vpi include path.
+               "-c-opts -I{DSIM_HOME}/include",
+               "-timescale 1ns/1ps",
+               "-f {sv_flist}",
+               "+incdir+{build_dir}",
+               // Suppress following DSim errors and warnings:
+               //   EnumMustBePositive - UVM 1.2 violates this
+               "-suppress EnumMustBePositive"
+              ]
+
+  run_opts:   [
+               "-work {build_dir}/dsim_out",
+               "-image image",
+               // UVM DPI
+               "-sv_lib {DSIM_HOME}/lib/libuvm_dpi.so",
+               "-sv_seed {seed}",
+               // tell DSim to write line-buffered std output (lines will be written in proper order)
+               "-linebuf",
+               "+UVM_TESTNAME={uvm_test}",
+               "+UVM_TEST_SEQ={uvm_test_seq}"]
+
+  // Indicate the tool specific helper sources - these are copied over to the
+  // {tool_srcs_dir} before running the simulation.
+  // TODO, there is no dsim tool file, point to vcs for now to avoid error from script
+  tool_srcs:  ["{dv_root}/tools/vcs/*"]
+
+  // TODO: refactor coverage configuration for DSim.
+
+  // COVERAGE related.
+  cov_db_dir: "{scratch_path}/coverage/{build_mode}.vdb"
+
+  // Individual test specific coverage data - this will be deleted if the test fails
+  // so that coverage from failing tests is not included in the final report.
+  cov_db_test_dir_name: "{run_dir_name}.{seed}"
+  cov_db_test_dir: "{cov_db_dir}/snps/coverage/db/testdata/{cov_db_test_dir_name}"
+
+  // Merging coverage.
+  // "cov_db_dirs" is a special variable that appends all build directories in use.
+  // It is constructed by the tool itself.
+  cov_merge_dir:    "{scratch_base_path}/cov_merge"
+  cov_merge_db_dir: "{cov_merge_dir}/merged.vdb"
+  cov_merge_cmd:    "{job_prefix} urg"
+  cov_merge_opts:   [
+                    ]
+  // Generate coverage reports in text as well as html.
+  cov_report_dir:   "{scratch_base_path}/cov_report"
+  cov_report_cmd:   "{job_prefix} urg"
+  cov_report_opts:  [
+                    ]
+  cov_report_txt:   "{cov_report_dir}/dashboard.txt"
+  cov_report_page:  "dashboard.html"
+
+  // Analyzing coverage - this is done by invoking --cov-analyze switch. It opens up the
+  // GUI for visual analysis.
+  cov_analyze_dir:  "{scratch_base_path}/cov_analyze"
+  cov_analyze_cmd:  "{job_prefix} verdi"
+  cov_analyze_opts: ["-cov",
+                     "-covdir {cov_merge_db_dir}",
+                     "-line nocasedef"
+                     "-elfile {vcs_cov_excl_files}"]
+
+  // Vars that need to exported to the env.
+  exports: [
+  ]
+
+  // Defaults for DSim
+  // TODO: there is currently no equivalent of "all" coverage metrics in DSim
+  cov_metrics:         ""
+
+  // pass and fail patterns
+  build_fail_patterns: ["^Error-.*$"]
+  run_fail_patterns:   ["^Error-.*$"] // Null pointer error
+
+  // waveform
+  wave_type:           "vcd"
+  wave_file:           "dsim_wave.{wave_type}"
+  probe_file:          "dsim.probe"
+
+  build_modes: [
+    {
+      name: dsim_waves
+      is_sim_mode: 1
+      build_opts: [
+                    "+acc+b"
+                  ]
+      run_opts:   [
+                    "-waves {wave_file}",
+                    // dsim.probe is currently undefined
+                    //"-wave-scope-specs {probe_file}",
+                    // Dump unpacked structs and arrays.
+                    "-dump-agg"
+                  ]
+    }
+    // TODO: support coverage mode
+    // Note: no specific build or run options are required for dsim to produce functional
+    // coverage. Code coverage support is evolving.
+    {
+      name: dsim_cov
+      is_sim_mode: 1
+      build_opts: [// Enable the required cov metrics
+                   ]
+      run_opts:   [// Enable the required cov metrics
+                   ]
+    }
+    // TODO: support xprop mode
+    {
+      name: dsim_xprop
+      is_sim_mode: 1
+    }
+    {
+      name: dsim_profile
+      is_sim_mode: 1
+      run_opts:   ["-profile"]
+    }
+    {
+      // TODO: Add build and run options to enable zero delay loop detection.
+      name: dsim_loopdetect
+      is_sim_mode: 1
+      build_opts: []
+      run_opts:   []
+    }
+  ]
+}

vendor/lowrisc_ip/dv/data/fusesoc.hjson

@@ -0,0 +1,16 @@
+// Copyright lowRISC contributors.
+// Licensed under the Apache License, Version 2.0, see LICENSE for details.
+// SPDX-License-Identifier: Apache-2.0
+{
+  sv_flist_gen_cmd:   fusesoc
+  fusesoc_core_:      "{eval_cmd} echo \"{fusesoc_core}\" | tr ':' '_'"
+  sv_flist_gen_opts:  ["{fusesoc_cores_root_dirs}",
+                       "run",
+                       "--flag=fileset_{design_level}",
+                       "--target=sim",
+                       "--build-root={build_dir}",
+                       "--setup {fusesoc_core}"]
+  fusesoc_cores_root_dirs: ["--cores-root {proj_root}"]
+  sv_flist_gen_dir:   "{build_dir}/sim-vcs"
+  sv_flist:           "{sv_flist_gen_dir}/{fusesoc_core_}.scr"
+}