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Convolutional Neural Network on FPGA trained on MNIST dataset

Verilog 1 Updated Apr 21, 2025

A digital hardware implementation of a cell membrane simulation game designed for an Artix-7 FPGA using Verilog.

Verilog 1 Updated Mar 10, 2025

Hardware Agent

Python 6 5 Updated Apr 20, 2025

LLM Agent for Hardware Description Language

Python 20 8 Updated Mar 17, 2025

A custom CNC plotter that draws uploaded images in the form of sine waves.

Python 2 Updated Dec 23, 2024

A convolution-based Sobel edge detection system on the Nexys A7 FPGA.

Verilog 1 Updated Mar 7, 2025

Object Recognition Turret

Python 1 Updated Feb 26, 2025

A 4-bit Arithmetic Logic Unit (ALU) built at gate level abstraction and implemented on the Basys 3 Artix-7 FPGA.

Verilog 1 Updated Mar 7, 2025

This repository hosts the code for an FPGA based accelerator for convolutional neural networks

Verilog 149 29 Updated Jun 20, 2024

Live Hardware Development (LiveHD), a productive infrastructure for Synthesis and Simulation

FIRRTL 221 50 Updated Apr 24, 2025