fix gate simulation broken by tc_sram_wrapper insertion (#871)

openhwgroup · May 11, 2022 · 2c3d0f7 · 2c3d0f7
1 parent b40bb32
commit 2c3d0f7
Showing 1 changed file with 1 addition and 1 deletion.
diff --git a/pd/synth/Makefile b/pd/synth/Makefile
@@ -36,7 +36,7 @@ cva6_synth: pre_cva6_synth
 	@echo $(PERIOD)
 	@export $(EXPORT_LIST); $(DC_SHELL_PATH)/dc_shell -f ./cva6_synth.tcl -output synthesis_batch.log
 	python scripts/gate_analysis.py '$(DESIGN_NAME)/reports/$(PERIOD)/$(DESIGN_NAME)_$(TECH_NAME)_synth_area.rpt' $(NAND2_AREA)
-	sed 's/tc_sram_256_64_00000008_00000001_00000001_none_0 gen/tc_sram gen/' ariane_synth.v > ariane_synth_modified.v
+	sed 's/tc_sram_wrapper_256_64_00000008_00000001_00000001_none_0 gen/tc_sram_wrapper gen/' ariane_synth.v > ariane_synth_modified.v
 
 cva6_read:
 	@export $(EXPORT_LIST); $(DC_SHELL_PATH)/dc_shell -f cva6_read.tcl -gui