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Commits on Sep 16, 2024

• ARM-based macOS support & riscv64 (#98)

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  lsk567

  authored
  31032fb

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Commits on May 18, 2024

• Port build system to CMake and restructure (#89)

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  magnmaeh

  and

  erlingrj

  authored
  7fbb896

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Commits on Apr 25, 2024

• Add support for running FlexPRET on FPGA (#88)

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  magnmaeh

  and

  erlingrj

  authored
  3fdd597

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Commits on Apr 18, 2024

• Context switch (#82)

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  magnmaeh

  and

  erlingrj

  authored
  ac4ef01

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Commits on Oct 19, 2023

• Cond vars (#81)

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  magnmaeh

  and

  erlingrj

  authored
  89a0785

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Commits on Jun 1, 2023

• Hold reset high first CC in Verilator emulation (#77)

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  erlingrj

  authored
  c0337ea

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Commits on Mar 21, 2023

• Bring in changes from InterPRET branch. (#61)

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  5 peopleauthored
  0f20ec3

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Commits on Jan 31, 2023

• Finish Chisel3 port and support flexible scheduling (#50)

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  lsk567

  authored
  39833a3

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Commits on Jan 15, 2023

• Implement thread_cancel() like pthreads (#48)

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  lsk567

  authored
  c027981

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Commits on Jan 9, 2023

• Locks and threading (#47)

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  3 peopleauthored
  a7a0a15

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Commits on Oct 19, 2022

• Fix ISPM and update tests (#38)

  lsk567

  authored
  3598a92

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Commits on Aug 31, 2022

• Fix ALU shift issue (#37)

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  lsk567

  authored
  a763a13

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Commits on Jul 25, 2022

• C regression tests (#32)

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  lsk567

  authored
  8437f5b

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Commits on Mar 24, 2021

• Implement a simulation flow

  edwardcwang

  committed
  7d98be3

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• Trim outdated info

  edwardcwang

  committed
  11587a2

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Commits on Feb 24, 2020

• another release with complete hw design (still with older RISC-V priv spec)

  

  mzimmer

  authored and

  edwardcwang

  committed
  f368d01

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• Organized header files (tests/include/flexpret_*) and created startup program (tests/include/startup.S) for multithreaded applications. Added several example programs in tests/examples: duty_comm.c…

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  mzimmer

  authored and

  edwardcwang

  committed
  cb073af

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• Added example C program to write, set mask, and clear mask GPIO pins for thread 0 (tests/examples). Emulator testbench extended to print out when GPIO changes or debug_string message is sent.

  

  mzimmer

  authored and

  edwardcwang

  committed
  106d846

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• Processor design overhaul while upgrading to latest version of Chisel and RISC-V.

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  mzimmer

  authored and

  edwardcwang

  committed
  2ea2f42

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Commits on Apr 14, 2014

• changed message on timeout

  mzimmer

  committed
  de74a2d

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Commits on Apr 13, 2014

• first release

  mzimmer

  committed
  463c0ef

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