Design and UVM-TB of RISC -V Microprocessor

RISC-V, an open-source instruction set architecture, is used to create custom processors for a wide range of applications, spanning from embedded systems to supercomputers.

Firstly, it was developed at the University of California, Berkeley, RISC-V represents the fifth generation of processors built on the concept of reduced instruction set computing (RISC).The term RISC stands for “reduced instruction set computer” which executes few computer instructions whereas ‘V’ stands for the 5th generation.

RISC-V Architecture without mult/div unit

the design support :

1-exception/interrupt handling.

2-detecting and handling data and control hazards.

3- RV32I & RV32M instructions set.