rewrite build.sc to depend on chisel and firrtl by source.

.gitignore

@@ -342,6 +342,7 @@ hs_err_pid*
 .vscode
 .metals
 .bloop
+.bsp
 .coursier
 mill.rdiB
 

.gitmodules

@@ -1,3 +1,15 @@
+[submodule "chisel3"]
+	path = chisel3
+	url = https://github.com/ucb-bar/chisel3
+[submodule "firrtl"]
+	path = firrtl
+	url = https://github.com/ucb-bar/firrtl
+[submodule "treadle"]
+	path = treadle
+	url = https://github.com/ucb-bar/treadle
+[submodule "hardfloat"]
+        path = hardfloat
+        url = https://github.com/ucb-bar/berkeley-hardfloat
 [submodule "rocket-chip"]
 	path = rocket-chip
 	url = https://github.com/chipsalliance/rocket-chip.git
@@ -10,3 +22,9 @@
 	path = chiseltest
 	url = https://github.com/ucb-bar/chisel-testers2.git
 	branch = 3e3ecc5b25b7b6bc48341ec07c7a54b7ad53bcb7
+[submodule "api-config-chipsalliance"]
+	path = api-config-chipsalliance
+	url = https://github.com/chipsalliance/api-config-chipsalliance
+[submodule "berkeley-hardfloat"]
+	path = berkeley-hardfloat
+	url = https://github.com/ucb-bar/berkeley-hardfloat

Makefile

@@ -129,11 +129,15 @@ cache:
 	$(MAKE) emu IMAGE=Makefile
 
 clean:
-	rm -rf $(BUILD_DIR)
+	git submodule foreach git clean -fdx
+	git clean -fd
 
 init:
 	git submodule update --init
-	@# do not use a recursive init to pull some not used submodules
-	cd ./rocket-chip/ && git submodule update --init api-config-chipsalliance hardfloat
 
-.PHONY: verilog emu clean help init $(REF_SO)
+bump:
+	git submodule foreach "git fetch origin&&git checkout master&&git reset --hard origin/master"
+
+bsp:
+	mill -i mill.contrib.BSP/install
+.PHONY: verilog emu clean help init bump bsp $(REF_SO)

build.sc

@@ -1,105 +1,118 @@
-import os.Path
 import mill._
 import mill.modules.Util
 import scalalib._
-import coursier.maven.MavenRepository
-
-object CustomZincWorkerModule extends ZincWorkerModule {
-  def repositories() = super.repositories ++ Seq(
-    MavenRepository("https://maven.aliyun.com/repository/public"),
-    MavenRepository("https://maven.aliyun.com/repository/apache-snapshots")
-  )
+import $ivy.`com.lihaoyi::mill-contrib-buildinfo:$MILL_VERSION`
+import $ivy.`com.lihaoyi::mill-contrib-bsp:$MILL_VERSION`
+import mill.contrib.buildinfo.BuildInfo
+import $file.chisel3.build
+import $file.firrtl.build
+import $file.treadle.build
+import $file.chiseltest.build
+import $file.`berkeley-hardfloat`.build
+import $file.`rocket-chip`.common
+import $file.`api-config-chipsalliance`.`build-rules`.mill.build
+
+val sv = "2.12.12"
+
+object myfirrtl extends firrtl.build.firrtlCrossModule(sv) {
+  override def millSourcePath = os.pwd / "firrtl"
 }
 
-trait CommonModule extends ScalaModule {
-  override def scalaVersion = "2.12.10"
+object mychisel3 extends chisel3.build.chisel3CrossModule(sv) {
+  override def millSourcePath = os.pwd / "chisel3"
 
-  override def scalacOptions = Seq("-Xsource:2.11")
+  def firrtlModule: Option[PublishModule] = Some(myfirrtl)
 
-  override def zincWorker = CustomZincWorkerModule
+  def treadleModule: Option[PublishModule] = Some(mytreadle)
+}
 
-  private val macroParadise = ivy"org.scalamacros:::paradise:2.1.0"
+object mytreadle extends treadle.build.treadleCrossModule(sv) {
+  override def millSourcePath = os.pwd / "treadle"
 
-  override def compileIvyDeps = Agg(macroParadise)
+  def firrtlModule: Option[PublishModule] = Some(myfirrtl)
+}
 
-  override def scalacPluginIvyDeps = Agg(macroParadise)
+object mychiseltest extends chiseltest.build.chiseltestCrossModule(sv) {
+  override def scalaVersion = sv
+  override def millSourcePath = os.pwd / "chiseltest"
+  def chisel3Module: Option[PublishModule] = Some(mychisel3)
+  def treadleModule: Option[PublishModule] = Some(mytreadle)
 }
 
-val chisel = Agg(
-  ivy"edu.berkeley.cs::chisel3:3.4.0"
-)
+object myhardfloat extends `berkeley-hardfloat`.build.hardfloat {
+  override def scalaVersion = sv
+
+  def chisel3Module: Option[PublishModule] = Some(mychisel3)
+}
 
-object `rocket-chip` extends SbtModule with CommonModule {
+object myconfig extends `api-config-chipsalliance`.`build-rules`.mill.build.config with PublishModule {
+  override def scalaVersion = sv
 
-  override def ivyDeps = super.ivyDeps() ++ Agg(
-    ivy"${scalaOrganization()}:scala-reflect:${scalaVersion()}",
-    ivy"org.json4s::json4s-jackson:3.6.1"
-  ) ++ chisel
+  override def millSourcePath = os.pwd / "api-config-chipsalliance" / "design" / "craft"
 
+  override def pomSettings = T {
+    myrocketchip.pomSettings()
+  }
 
-  object `api-config-chipsalliance` extends CommonModule {
-    override def millSourcePath = super.millSourcePath / 'design / 'craft
+  override def publishVersion = T {
+    myrocketchip.publishVersion()
   }
+}
 
-  object macros extends SbtModule with CommonModule
+object myrocketchip extends `rocket-chip`.common.CommonRocketChip {
+  override def scalaVersion = sv
 
-  object hardfloat extends SbtModule with CommonModule {
-    override def ivyDeps = super.ivyDeps() ++ chisel
-  }
+  override def millSourcePath = os.pwd / "rocket-chip"
 
-  override def moduleDeps = super.moduleDeps ++ Seq(
-    `api-config-chipsalliance`, macros, hardfloat
-  )
+  def chisel3Module: Option[PublishModule] = Some(mychisel3)
+
+  def hardfloatModule: PublishModule = myhardfloat
 
+  def configModule: PublishModule = myconfig
 }
 
-object `block-inclusivecache-sifive` extends CommonModule {
-  override def ivyDeps = super.ivyDeps() ++ chisel
 
-  override def millSourcePath = super.millSourcePath / 'design / 'craft / 'inclusivecache
+trait CommonModule extends ScalaModule {
+  override def scalaVersion = sv
 
-  override def moduleDeps = super.moduleDeps ++ Seq(`rocket-chip`)
+  override def scalacOptions = Seq("-Xsource:2.11")
+
+  override def moduleDeps: Seq[ScalaModule] = Seq(mychisel3)
+
+  private val macroParadise = ivy"org.scalamacros:::paradise:2.1.1"
+
+  override def compileIvyDeps = Agg(macroParadise)
+
+  override def scalacPluginIvyDeps = Agg(macroParadise)
 }
 
-object chiseltest extends CommonModule with SbtModule {
-  override def ivyDeps = super.ivyDeps() ++ Agg(
-	ivy"edu.berkeley.cs::treadle:1.3.0",
-	ivy"org.scalatest::scalatest:3.0.8",
-	ivy"com.lihaoyi::utest:0.7.4"
-  ) ++ chisel
-  object test extends Tests {
-	def ivyDeps = Agg(ivy"org.scalacheck::scalacheck:1.14.3")
-	def testFrameworks = Seq("org.scalatest.tools.Framework")
-  }
+object myinclusivecache extends CommonModule {
+  override def millSourcePath = os.pwd / "block-inclusivecache-sifive" / "design" / "craft" / "inclusivecache"
+
+  override def moduleDeps = super.moduleDeps ++ Seq(myrocketchip)
 }
 
+object myblocks extends CommonModule with SbtModule {
+  override def moduleDeps = super.moduleDeps ++ Seq(myrocketchip)
+}
 
 object XiangShan extends CommonModule with SbtModule {
   override def millSourcePath = millOuterCtx.millSourcePath
-
   override def forkArgs = Seq("-Xmx10G")
-
-  override def ivyDeps = super.ivyDeps() ++ chisel
   override def moduleDeps = super.moduleDeps ++ Seq(
-    `rocket-chip`, 
-	`block-inclusivecache-sifive`,
-	chiseltest
+    myrocketchip,
+    myinclusivecache,
   )
 
   object test extends Tests {
-    override def ivyDeps = super.ivyDeps() ++ Agg(
-      ivy"org.scalatest::scalatest:3.0.4",
-      ivy"edu.berkeley.cs::chisel-iotesters:1.2+",
+    override def ivyDeps = Agg(
+      ivy"org.scalatest::scalatest:3.2.0",
+    )
+    override def moduleDeps = super.moduleDeps ++ Seq(
+      mychiseltest
     )
-
     def testFrameworks = Seq(
       "org.scalatest.tools.Framework"
     )
-
-    def testOnly(args: String*) = T.command {
-      super.runMain("org.scalatest.tools.Runner", args: _*)
-    }
   }
-
 }
-