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  1. school_synth_homework_4 school_synth_homework_4 Public

    My solution of homework #4 of chipdesignschool 2023/2024. https://github.com/chipdesignschool/systemverilog-homework

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  2. proc_riscv_kass_andra_go proc_riscv_kass_andra_go Public

    My implementation of RISC-V processor

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  3. translator_riscv translator_riscv Public

    Translate assembler RISC-V (ISA RV32I) to machine code

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  4. arduino_tm1638 arduino_tm1638 Public

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  5. school_synth_homework_5_fifo school_synth_homework_5_fifo Public

    This is my solution of homework #5 of Chip Desing School 2023/2024. The task is located here https://github.com/chipdesignschool/systemverilog-homework.

    SystemVerilog