Fix a bug about repeated writing

zhaohui-ma · Sep 1, 2021 · f81ea2c · f81ea2c
1 parent 4fc9ccd
commit f81ea2c
Showing 1 changed file with 4 additions and 1 deletion.
diff --git a/projects/cpu_axi_diff/vsrc/cpu.v b/projects/cpu_axi_diff/vsrc/cpu.v
@@ -94,12 +94,15 @@ exe_stage Exe_stage(
   .rd_data            (rd_data)
 );
 
+
+wire w_ena = rd_w_ena & fetched;
+
 regfile Regfile(
   .clk                (clock),
   .rst                (reset),
   .w_addr             (rd_w_addr),
   .w_data             (rd_data),
-  .w_ena              (rd_w_ena),
+  .w_ena              (w_ena),
 
   .r_addr1            (rs1_r_addr),
   .r_data1            (r_data1),